powerpc: Enable device tree support for T1042D4RDB

Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

arch/powerpc/dts/Makefile

@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
+dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
 dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
 dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb
 dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb

arch/powerpc/dts/t1042d4rdb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T1042D4RDB Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "t104x.dtsi"
+
+/ {
+	model = "fsl,T1042D4RDB";
+	compatible = "fsl,T1042D4RDB";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+};

arch/powerpc/dts/t104x.dtsi

@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T104X Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: PowerPC,e5500@0 {
+			device_type = "cpu";
+			reg = <0>;
+			#cooling-cells = <2>;
+		};
+		cpu1: PowerPC,e5500@1 {
+			device_type = "cpu";
+			reg = <1>;
+			#cooling-cells = <2>;
+		};
+		cpu2: PowerPC,e5500@2 {
+			device_type = "cpu";
+			reg = <2>;
+			#cooling-cells = <2>;
+		};
+		cpu3: PowerPC,e5500@3 {
+			device_type = "cpu";
+			reg = <3>;
+			#cooling-cells = <2>;
+		};
+	};
+
+	soc: soc@ffe000000 {
+		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+		reg = <0xf 0xfe000000 0 0x00001000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		device_type = "soc";
+		compatible = "simple-bus";
+
+		mpic: pic@40000 {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <4>;
+			reg = <0x40000 0x40000>;
+			compatible = "fsl,mpic", "chrp,open-pic";
+			device_type = "open-pic";
+			clock-frequency = <0x0>;
+		};
+	};
+};

board/freescale/t104xrdb/README

@@ -365,3 +365,22 @@ to
 2. SPI does not support flush so remove flush from pbl, make changes in
    tools/pblimage.c file, Update value of pbl_end_cmd[0] = 0x09138000
    with 0x091380c0
+
+Device tree support and how to enable it for different configs
+--------------------------------------------------------------
+Device tree support is available for t1042d4rdb for below mentioned boot,
+1. NOR Boot
+2. NAND Boot
+3. SD Boot
+4. SPIFLASH Boot
+
+To enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" (Change default device tree name if required)
+2. CONFIG_OF_CONTROL
+3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
+   CONFIG_RESET_VECTOR_ADDRESS - 0xffc
+
+If device tree support is enabled in defconfig,
+1. use 'u-boot-with-dtb.bin' for NOR boot.
+2. use 'u-boot-with-spl-pbl.bin' for other boot.

configs/T1042D4RDB_NAND_defconfig

@@ -44,6 +44,8 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
@@ -70,4 +72,3 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
 CONFIG_CFB_CONSOLE_ANSI=y
-CONFIG_OF_LIBFDT=y

configs/T1042D4RDB_SDCARD_defconfig

@@ -42,6 +42,8 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
@@ -67,4 +69,3 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
 CONFIG_CFB_CONSOLE_ANSI=y
-CONFIG_OF_LIBFDT=y

configs/T1042D4RDB_SPIFLASH_defconfig

@@ -43,6 +43,8 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
@@ -68,4 +70,3 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
 CONFIG_CFB_CONSOLE_ANSI=y
-CONFIG_OF_LIBFDT=y

configs/T1042D4RDB_defconfig

@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -28,6 +29,8 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
@@ -53,4 +56,3 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
 CONFIG_CFB_CONSOLE_ANSI=y
-CONFIG_OF_LIBFDT=y