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mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT

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CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Peng Fan
2017-06-12 17:50:55 +08:00
committed by Stefano Babic
parent 4483b7eb88
commit f34ccce50a
5 changed files with 1 additions and 9 deletions
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2
doc/README.fsl-esdhc
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@@ -20,5 +20,3 @@ Freescale esdhc-specific options
- CONFIG_SYS_FSL_ESDHC_BE
ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined
by ESDHC IP's endian mode or processor's endian mode.
- CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.