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power, timer: reset TBL before TBU

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In order to avoid TBU increment due to TBL reaching its max
and wrapping, reset TBL before resetting TBU

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
This commit is contained in:
Christophe Leroy
2017-07-13 15:09:50 +02:00
committed by Tom Rini
parent 93e85d02b2
commit f0eda3cb89
1 changed files with 1 additions and 1 deletions
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2
arch/powerpc/lib/time.c
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@@ -66,7 +66,7 @@ int timer_init(void)
unsigned long temp;
/* reset */
asm volatile("li %0,0 ; mttbu %0 ; mttbl %0;"
asm volatile("li %0,0 ; mttbl %0 ; mttbu %0;"
: "=&r"(temp) );
return (0);