mirror of
https://xff.cz/git/u-boot/
synced 2025-09-18 00:52:07 +02:00
- Add support for Intel FSP-S and FSP-T in binman - Correct priority selection for image loaders for SPL - Add a size check for TPL - Various small SPL/TPL bug fixes and changes - SPI: Add support for memory-mapped flash
This commit is contained in:
7
Makefile
7
Makefile
@@ -806,6 +806,12 @@ else
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SPL_SIZE_CHECK =
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SPL_SIZE_CHECK =
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endif
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endif
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ifneq ($(CONFIG_TPL_SIZE_LIMIT),0)
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TPL_SIZE_CHECK = @$(call size_check,$@,$(CONFIG_TPL_SIZE_LIMIT))
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else
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TPL_SIZE_CHECK =
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endif
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# Statically apply RELA-style relocations (currently arm64 only)
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# Statically apply RELA-style relocations (currently arm64 only)
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# This is useful for arm64 where static relocation needs to be performed on
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# This is useful for arm64 where static relocation needs to be performed on
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# the raw binary, but certain simulators only accept an ELF file (but don't
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# the raw binary, but certain simulators only accept an ELF file (but don't
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@@ -1806,6 +1812,7 @@ spl/boot.bin: spl/u-boot-spl
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tpl/u-boot-tpl.bin: tools prepare \
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tpl/u-boot-tpl.bin: tools prepare \
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$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
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$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
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$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
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$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
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$(TPL_SIZE_CHECK)
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TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)
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TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)
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@@ -385,6 +385,14 @@ static void setup_mtrr(void)
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}
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}
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}
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}
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int x86_cpu_init_tpl(void)
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{
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setup_cpu_features();
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setup_identity();
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return 0;
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}
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int x86_cpu_init_f(void)
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int x86_cpu_init_f(void)
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{
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{
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if (ll_boot_init())
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if (ll_boot_init())
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@@ -31,6 +31,7 @@ _start:
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call board_init_f_init_reserve
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call board_init_f_init_reserve
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call x86_cpu_reinit_f
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xorl %eax, %eax
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xorl %eax, %eax
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call board_init_f
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call board_init_f
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call board_init_f_r
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call board_init_f_r
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@@ -55,6 +55,7 @@ enum {
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X86_SYSCON_PINCONF, /* Intel x86 pin configuration */
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X86_SYSCON_PINCONF, /* Intel x86 pin configuration */
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X86_SYSCON_PMU, /* Power Management Unit */
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X86_SYSCON_PMU, /* Power Management Unit */
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X86_SYSCON_SCU, /* System Controller Unit */
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X86_SYSCON_SCU, /* System Controller Unit */
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X86_SYSCON_PUNIT, /* Power unit */
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};
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};
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struct cpuid_result {
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struct cpuid_result {
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@@ -76,6 +76,7 @@ struct arch_global_data {
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uint8_t x86_mask;
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uint8_t x86_mask;
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uint32_t x86_device;
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uint32_t x86_device;
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uint64_t tsc_base; /* Initial value returned by rdtsc() */
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uint64_t tsc_base; /* Initial value returned by rdtsc() */
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bool tsc_inited; /* true if tsc is ready for use */
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unsigned long clock_rate; /* Clock rate of timer in Hz */
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unsigned long clock_rate; /* Clock rate of timer in Hz */
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void *new_fdt; /* Relocated FDT */
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void *new_fdt; /* Relocated FDT */
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uint32_t bist; /* Built-in self test value */
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uint32_t bist; /* Built-in self test value */
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@@ -34,6 +34,15 @@ int x86_cpu_init_f(void);
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*/
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*/
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int x86_cpu_reinit_f(void);
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int x86_cpu_reinit_f(void);
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/**
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* x86_cpu_init_tpl() - Do the minimum possible CPU init
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*
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* This just sets up the CPU features and figured out the identity
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*
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* @return 0 (indicating success, to mimic cpu_init_f())
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*/
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int x86_cpu_init_tpl(void);
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int cpu_init_f(void);
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int cpu_init_f(void);
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void setup_gdt(struct global_data *id, u64 *gdt_addr);
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void setup_gdt(struct global_data *id, u64 *gdt_addr);
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/*
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/*
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@@ -5,11 +5,15 @@
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#include <common.h>
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#include <common.h>
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#include <debug_uart.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <malloc.h>
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#include <malloc.h>
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#include <spl.h>
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#include <spl.h>
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#include <syscon.h>
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#include <asm/cpu.h>
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#include <asm/cpu.h>
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#include <asm/cpu_common.h>
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#include <asm/mrccache.h>
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#include <asm/mrccache.h>
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#include <asm/mtrr.h>
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#include <asm/mtrr.h>
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#include <asm/pci.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/spl.h>
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#include <asm/spl.h>
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#include <asm-generic/sections.h>
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#include <asm-generic/sections.h>
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@@ -21,6 +25,32 @@ __weak int arch_cpu_init_dm(void)
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_TPL
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static int set_max_freq(void)
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{
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if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) {
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/*
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* Burst Mode has been factory-configured as disabled and is not
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* available in this physical processor package
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*/
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debug("Burst Mode is factory-disabled\n");
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return -ENOENT;
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}
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/* Enable burst mode */
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cpu_set_burst_mode(true);
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/* Enable speed step */
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cpu_set_eist(true);
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/* Set P-State ratio */
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cpu_set_p_state_to_turbo_ratio();
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return 0;
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}
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#endif
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static int x86_spl_init(void)
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static int x86_spl_init(void)
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{
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{
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#ifndef CONFIG_TPL
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#ifndef CONFIG_TPL
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@@ -31,10 +61,16 @@ static int x86_spl_init(void)
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* place it immediately below CONFIG_SYS_TEXT_BASE.
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* place it immediately below CONFIG_SYS_TEXT_BASE.
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*/
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*/
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char *ptr = (char *)0x110000;
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char *ptr = (char *)0x110000;
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#else
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struct udevice *punit;
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#endif
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#endif
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int ret;
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int ret;
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debug("%s starting\n", __func__);
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debug("%s starting\n", __func__);
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if (IS_ENABLED(TPL))
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ret = x86_cpu_reinit_f();
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else
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ret = x86_cpu_init_f();
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ret = spl_init();
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ret = spl_init();
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if (ret) {
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if (ret) {
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debug("%s: spl_init() failed\n", __func__);
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debug("%s: spl_init() failed\n", __func__);
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@@ -101,6 +137,14 @@ static int x86_spl_init(void)
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return ret;
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return ret;
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}
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}
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mtrr_commit(true);
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mtrr_commit(true);
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#else
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ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit);
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if (ret)
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debug("Could not find PUNIT (err=%d)\n", ret);
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ret = set_max_freq();
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if (ret)
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debug("Failed to set CPU frequency (err=%d)\n", ret);
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#endif
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#endif
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return 0;
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return 0;
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@@ -5,6 +5,7 @@
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#include <common.h>
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#include <common.h>
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#include <debug_uart.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <spl.h>
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#include <spl.h>
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#include <asm/cpu.h>
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#include <asm/cpu.h>
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#include <asm/mtrr.h>
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#include <asm/mtrr.h>
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@@ -23,6 +24,11 @@ static int x86_tpl_init(void)
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int ret;
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int ret;
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debug("%s starting\n", __func__);
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debug("%s starting\n", __func__);
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ret = x86_cpu_init_tpl();
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if (ret) {
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debug("%s: x86_cpu_init_tpl() failed\n", __func__);
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return ret;
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}
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ret = spl_init();
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ret = spl_init();
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if (ret) {
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if (ret) {
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debug("%s: spl_init() failed\n", __func__);
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debug("%s: spl_init() failed\n", __func__);
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@@ -39,11 +45,6 @@ static int x86_tpl_init(void)
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return ret;
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return ret;
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}
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}
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preloader_console_init();
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preloader_console_init();
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ret = print_cpuinfo();
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if (ret) {
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debug("%s: print_cpuinfo() failed\n", __func__);
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return ret;
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}
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return 0;
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return 0;
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}
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}
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@@ -106,7 +107,7 @@ int spl_spi_load_image(void)
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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{
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printf("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point);
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debug("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point);
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jump_to_spl(spl_image->entry_point);
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jump_to_spl(spl_image->entry_point);
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hang();
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hang();
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}
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}
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@@ -115,3 +116,27 @@ void spl_board_init(void)
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{
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{
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preloader_console_init();
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preloader_console_init();
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}
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}
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#if !CONFIG_IS_ENABLED(PCI)
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/*
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* This is a fake PCI bus for TPL when it doesn't have proper PCI. It is enough
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* to bind the devices on the PCI bus, some of which have early-regs properties
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* providing fixed BARs. Individual drivers program these BARs themselves so
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* that they can access the devices. The BARs are allocated statically in the
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* device tree.
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*
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* Once SPL is running it enables PCI properly, but does not auto-assign BARs
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* for devices, so the TPL BARs continue to be used. Once U-Boot starts it does
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* the auto allocation (after relocation).
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*/
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static const struct udevice_id tpl_fake_pci_ids[] = {
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{ .compatible = "pci-x86" },
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{ }
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};
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U_BOOT_DRIVER(pci_x86) = {
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.name = "pci_x86",
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.id = UCLASS_SIMPLE_BUS,
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.of_match = tpl_fake_pci_ids,
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};
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#endif
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@@ -1232,6 +1232,14 @@ config TPL
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if TPL
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if TPL
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config TPL_SIZE_LIMIT
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hex "Maximum size of TPL image"
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depends on TPL
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default 0
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help
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|
Specifies the maximum length of the U-Boot TPL image.
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If this value is zero, it is ignored.
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|
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config TPL_HANDOFF
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config TPL_HANDOFF
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bool "Pass hand-off information from TPL to SPL and U-Boot proper"
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bool "Pass hand-off information from TPL to SPL and U-Boot proper"
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depends on HANDOFF && TPL_BLOBLIST
|
depends on HANDOFF && TPL_BLOBLIST
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@@ -269,7 +269,7 @@ For example:
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};
|
};
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U_BOOT_DRIVER(mmc_drv) = {
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U_BOOT_DRIVER(mmc_drv) = {
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.name = "mmc",
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.name = "vendor_mmc", /* matches compatible string */
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.id = UCLASS_MMC,
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.id = UCLASS_MMC,
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.of_match = mmc_ids,
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.of_match = mmc_ids,
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.ofdata_to_platdata = mmc_ofdata_to_platdata,
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.ofdata_to_platdata = mmc_ofdata_to_platdata,
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@@ -122,11 +122,22 @@ static int sandbox_cs_info(struct udevice *bus, uint cs,
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return 0;
|
return 0;
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}
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}
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static int sandbox_spi_get_mmap(struct udevice *dev, ulong *map_basep,
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uint *map_sizep, uint *offsetp)
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{
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*map_basep = 0x1000;
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*map_sizep = 0x2000;
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*offsetp = 0x100;
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return 0;
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}
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static const struct dm_spi_ops sandbox_spi_ops = {
|
static const struct dm_spi_ops sandbox_spi_ops = {
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.xfer = sandbox_spi_xfer,
|
.xfer = sandbox_spi_xfer,
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.set_speed = sandbox_spi_set_speed,
|
.set_speed = sandbox_spi_set_speed,
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.set_mode = sandbox_spi_set_mode,
|
.set_mode = sandbox_spi_set_mode,
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.cs_info = sandbox_cs_info,
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.cs_info = sandbox_cs_info,
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.get_mmap = sandbox_spi_get_mmap,
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};
|
};
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|
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static const struct udevice_id sandbox_spi_ids[] = {
|
static const struct udevice_id sandbox_spi_ids[] = {
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|
@@ -92,6 +92,20 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
|
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return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
|
return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
|
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}
|
}
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|
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|
int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
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|
uint *offsetp)
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|
{
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|
struct udevice *bus = dev->parent;
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|
struct dm_spi_ops *ops = spi_get_ops(bus);
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|
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||||||
|
if (bus->uclass->uc_drv->id != UCLASS_SPI)
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|
return -EOPNOTSUPP;
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|
if (!ops->get_mmap)
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|
return -ENOSYS;
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|
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||||||
|
return ops->get_mmap(dev, map_basep, map_sizep, offsetp);
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|
}
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|
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int spi_claim_bus(struct spi_slave *slave)
|
int spi_claim_bus(struct spi_slave *slave)
|
||||||
{
|
{
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return log_ret(dm_spi_claim_bus(slave->dev));
|
return log_ret(dm_spi_claim_bus(slave->dev));
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|
@@ -394,7 +394,7 @@ static int tsc_timer_get_count(struct udevice *dev, u64 *count)
|
|||||||
|
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static void tsc_timer_ensure_setup(bool early)
|
static void tsc_timer_ensure_setup(bool early)
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{
|
{
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if (gd->arch.tsc_base)
|
if (gd->arch.tsc_inited)
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return;
|
return;
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gd->arch.tsc_base = rdtsc();
|
gd->arch.tsc_base = rdtsc();
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|
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@@ -425,6 +425,7 @@ static void tsc_timer_ensure_setup(bool early)
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done:
|
done:
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gd->arch.clock_rate = fast_calibrate * 1000000;
|
gd->arch.clock_rate = fast_calibrate * 1000000;
|
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}
|
}
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|
gd->arch.tsc_inited = true;
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}
|
}
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|
|
||||||
static int tsc_timer_probe(struct udevice *dev)
|
static int tsc_timer_probe(struct udevice *dev)
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@@ -461,6 +462,8 @@ unsigned long notrace timer_early_get_rate(void)
|
|||||||
|
|
||||||
u64 notrace timer_early_get_count(void)
|
u64 notrace timer_early_get_count(void)
|
||||||
{
|
{
|
||||||
|
tsc_timer_ensure_setup(true);
|
||||||
|
|
||||||
return rdtsc() - gd->arch.tsc_base;
|
return rdtsc() - gd->arch.tsc_base;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@@ -72,13 +72,13 @@ struct cbfs_fileheader {
|
|||||||
|
|
||||||
struct cbfs_cachenode {
|
struct cbfs_cachenode {
|
||||||
struct cbfs_cachenode *next;
|
struct cbfs_cachenode *next;
|
||||||
u32 type;
|
|
||||||
void *data;
|
void *data;
|
||||||
u32 data_length;
|
|
||||||
char *name;
|
char *name;
|
||||||
|
u32 type;
|
||||||
|
u32 data_length;
|
||||||
u32 name_length;
|
u32 name_length;
|
||||||
u32 attributes_offset;
|
u32 attributes_offset;
|
||||||
} __packed;
|
};
|
||||||
|
|
||||||
extern enum cbfs_result file_cbfs_result;
|
extern enum cbfs_result file_cbfs_result;
|
||||||
|
|
||||||
|
@@ -462,6 +462,19 @@ struct dm_spi_ops {
|
|||||||
* is invalid, other -ve value on error
|
* is invalid, other -ve value on error
|
||||||
*/
|
*/
|
||||||
int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
|
int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* get_mmap() - Get memory-mapped SPI
|
||||||
|
*
|
||||||
|
* @dev: The SPI flash slave device
|
||||||
|
* @map_basep: Returns base memory address for mapped SPI
|
||||||
|
* @map_sizep: Returns size of mapped SPI
|
||||||
|
* @offsetp: Returns start offset of SPI flash where the map works
|
||||||
|
* correctly (offsets before this are not visible)
|
||||||
|
* @return 0 if OK, -EFAULT if memory mapping is not available
|
||||||
|
*/
|
||||||
|
int (*get_mmap)(struct udevice *dev, ulong *map_basep,
|
||||||
|
uint *map_sizep, uint *offsetp);
|
||||||
};
|
};
|
||||||
|
|
||||||
struct dm_spi_emul_ops {
|
struct dm_spi_emul_ops {
|
||||||
@@ -650,6 +663,20 @@ void dm_spi_release_bus(struct udevice *dev);
|
|||||||
int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
|
int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
|
||||||
const void *dout, void *din, unsigned long flags);
|
const void *dout, void *din, unsigned long flags);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* spi_get_mmap() - Get memory-mapped SPI
|
||||||
|
*
|
||||||
|
* @dev: SPI slave device to check
|
||||||
|
* @map_basep: Returns base memory address for mapped SPI
|
||||||
|
* @map_sizep: Returns size of mapped SPI
|
||||||
|
* @offsetp: Returns start offset of SPI flash where the map works
|
||||||
|
* correctly (offsets before this are not visible)
|
||||||
|
* @return 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not
|
||||||
|
* available
|
||||||
|
*/
|
||||||
|
int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
|
||||||
|
uint *offsetp);
|
||||||
|
|
||||||
/* Access the operations for a SPI device */
|
/* Access the operations for a SPI device */
|
||||||
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
|
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
|
||||||
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
|
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
|
||||||
|
@@ -332,14 +332,14 @@ struct spl_image_loader {
|
|||||||
*/
|
*/
|
||||||
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
|
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||||
#define SPL_LOAD_IMAGE_METHOD(_name, _priority, _boot_device, _method) \
|
#define SPL_LOAD_IMAGE_METHOD(_name, _priority, _boot_device, _method) \
|
||||||
SPL_LOAD_IMAGE(_method ## _priority ## _boot_device) = { \
|
SPL_LOAD_IMAGE(_boot_device ## _priority ## _method) = { \
|
||||||
.name = _name, \
|
.name = _name, \
|
||||||
.boot_device = _boot_device, \
|
.boot_device = _boot_device, \
|
||||||
.load_image = _method, \
|
.load_image = _method, \
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
#define SPL_LOAD_IMAGE_METHOD(_name, _priority, _boot_device, _method) \
|
#define SPL_LOAD_IMAGE_METHOD(_name, _priority, _boot_device, _method) \
|
||||||
SPL_LOAD_IMAGE(_method ## _priority ## _boot_device) = { \
|
SPL_LOAD_IMAGE(_boot_device ## _priority ## _method) = { \
|
||||||
.boot_device = _boot_device, \
|
.boot_device = _boot_device, \
|
||||||
.load_image = _method, \
|
.load_image = _method, \
|
||||||
}
|
}
|
||||||
|
@@ -23,6 +23,9 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
|
|||||||
int full_size = 0x200000;
|
int full_size = 0x200000;
|
||||||
int size = 0x10000;
|
int size = 0x10000;
|
||||||
u8 *src, *dst;
|
u8 *src, *dst;
|
||||||
|
uint map_size;
|
||||||
|
ulong map_base;
|
||||||
|
uint offset;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
src = map_sysmem(0x20000, full_size);
|
src = map_sysmem(0x20000, full_size);
|
||||||
@@ -54,6 +57,12 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
|
|||||||
sandbox_sf_set_block_protect(emul, 0);
|
sandbox_sf_set_block_protect(emul, 0);
|
||||||
ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
|
ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
|
||||||
|
|
||||||
|
/* Check mapping */
|
||||||
|
ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset));
|
||||||
|
ut_asserteq(0x1000, map_base);
|
||||||
|
ut_asserteq(0x2000, map_size);
|
||||||
|
ut_asserteq(0x100, offset);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Since we are about to destroy all devices, we must tell sandbox
|
* Since we are about to destroy all devices, we must tell sandbox
|
||||||
* to forget the emulation device
|
* to forget the emulation device
|
||||||
|
@@ -444,6 +444,39 @@ See README.x86 for information about x86 binary blobs.
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
Entry: intel-fsp-s: Entry containing Intel Firmware Support Package (FSP) silicon init
|
||||||
|
--------------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
Properties / Entry arguments:
|
||||||
|
- filename: Filename of file to read into entry
|
||||||
|
|
||||||
|
This file contains a binary blob which is used on some devices to set up
|
||||||
|
the silicon. U-Boot executes this code in U-Boot proper after SDRAM is
|
||||||
|
running, so that it can make full use of memory. Documentation is typically
|
||||||
|
not available in sufficient detail to allow U-Boot do this this itself.
|
||||||
|
|
||||||
|
An example filename is 'fsp_s.bin'
|
||||||
|
|
||||||
|
See README.x86 for information about x86 binary blobs.
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
Entry: intel-fsp-t: Entry containing Intel Firmware Support Package (FSP) temp ram init
|
||||||
|
---------------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
Properties / Entry arguments:
|
||||||
|
- filename: Filename of file to read into entry
|
||||||
|
|
||||||
|
This file contains a binary blob which is used on some devices to set up
|
||||||
|
temporary memory (Cache-as-RAM or CAR). U-Boot executes this code in TPL so
|
||||||
|
that it has access to memory for its stack and initial storage.
|
||||||
|
|
||||||
|
An example filename is 'fsp_t.bin'
|
||||||
|
|
||||||
|
See README.x86 for information about x86 binary blobs.
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
Entry: intel-ifwi: Entry containing an Intel Integrated Firmware Image (IFWI) file
|
Entry: intel-ifwi: Entry containing an Intel Integrated Firmware Image (IFWI) file
|
||||||
----------------------------------------------------------------------------------
|
----------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
@@ -135,9 +135,7 @@ def LookupAndWriteSymbols(elf_fname, entry, section):
|
|||||||
|
|
||||||
# Look up the symbol in our entry tables.
|
# Look up the symbol in our entry tables.
|
||||||
value = section.LookupSymbol(name, sym.weak, msg)
|
value = section.LookupSymbol(name, sym.weak, msg)
|
||||||
if value is not None:
|
if value is None:
|
||||||
value += base.address
|
|
||||||
else:
|
|
||||||
value = -1
|
value = -1
|
||||||
pack_string = pack_string.lower()
|
pack_string = pack_string.lower()
|
||||||
value_bytes = struct.pack(pack_string, value)
|
value_bytes = struct.pack(pack_string, value)
|
||||||
|
@@ -2,7 +2,7 @@
|
|||||||
# Copyright 2019 Google LLC
|
# Copyright 2019 Google LLC
|
||||||
# Written by Simon Glass <sjg@chromium.org>
|
# Written by Simon Glass <sjg@chromium.org>
|
||||||
#
|
#
|
||||||
# Entry-type module for Intel Firmware Support Package binary blob (T section)
|
# Entry-type module for Intel Firmware Support Package binary blob (M section)
|
||||||
#
|
#
|
||||||
|
|
||||||
from entry import Entry
|
from entry import Entry
|
||||||
|
27
tools/binman/etype/intel_fsp_s.py
Normal file
27
tools/binman/etype/intel_fsp_s.py
Normal file
@@ -0,0 +1,27 @@
|
|||||||
|
# SPDX-License-Identifier: GPL-2.0+
|
||||||
|
# Copyright 2019 Google LLC
|
||||||
|
# Written by Simon Glass <sjg@chromium.org>
|
||||||
|
#
|
||||||
|
# Entry-type module for Intel Firmware Support Package binary blob (S section)
|
||||||
|
#
|
||||||
|
|
||||||
|
from entry import Entry
|
||||||
|
from blob import Entry_blob
|
||||||
|
|
||||||
|
class Entry_intel_fsp_s(Entry_blob):
|
||||||
|
"""Entry containing Intel Firmware Support Package (FSP) silicon init
|
||||||
|
|
||||||
|
Properties / Entry arguments:
|
||||||
|
- filename: Filename of file to read into entry
|
||||||
|
|
||||||
|
This file contains a binary blob which is used on some devices to set up
|
||||||
|
the silicon. U-Boot executes this code in U-Boot proper after SDRAM is
|
||||||
|
running, so that it can make full use of memory. Documentation is typically
|
||||||
|
not available in sufficient detail to allow U-Boot do this this itself.
|
||||||
|
|
||||||
|
An example filename is 'fsp_s.bin'
|
||||||
|
|
||||||
|
See README.x86 for information about x86 binary blobs.
|
||||||
|
"""
|
||||||
|
def __init__(self, section, etype, node):
|
||||||
|
Entry_blob.__init__(self, section, etype, node)
|
26
tools/binman/etype/intel_fsp_t.py
Normal file
26
tools/binman/etype/intel_fsp_t.py
Normal file
@@ -0,0 +1,26 @@
|
|||||||
|
# SPDX-License-Identifier: GPL-2.0+
|
||||||
|
# Copyright 2019 Google LLC
|
||||||
|
# Written by Simon Glass <sjg@chromium.org>
|
||||||
|
#
|
||||||
|
# Entry-type module for Intel Firmware Support Package binary blob (T section)
|
||||||
|
#
|
||||||
|
|
||||||
|
from entry import Entry
|
||||||
|
from blob import Entry_blob
|
||||||
|
|
||||||
|
class Entry_intel_fsp_t(Entry_blob):
|
||||||
|
"""Entry containing Intel Firmware Support Package (FSP) temp ram init
|
||||||
|
|
||||||
|
Properties / Entry arguments:
|
||||||
|
- filename: Filename of file to read into entry
|
||||||
|
|
||||||
|
This file contains a binary blob which is used on some devices to set up
|
||||||
|
temporary memory (Cache-as-RAM or CAR). U-Boot executes this code in TPL so
|
||||||
|
that it has access to memory for its stack and initial storage.
|
||||||
|
|
||||||
|
An example filename is 'fsp_t.bin'
|
||||||
|
|
||||||
|
See README.x86 for information about x86 binary blobs.
|
||||||
|
"""
|
||||||
|
def __init__(self, section, etype, node):
|
||||||
|
Entry_blob.__init__(self, section, etype, node)
|
@@ -73,6 +73,8 @@ FILES_DATA = (b"sorry I'm late\nOh, don't bother apologising, I'm " +
|
|||||||
COMPRESS_DATA = b'compress xxxxxxxxxxxxxxxxxxxxxx data'
|
COMPRESS_DATA = b'compress xxxxxxxxxxxxxxxxxxxxxx data'
|
||||||
REFCODE_DATA = b'refcode'
|
REFCODE_DATA = b'refcode'
|
||||||
FSP_M_DATA = b'fsp_m'
|
FSP_M_DATA = b'fsp_m'
|
||||||
|
FSP_S_DATA = b'fsp_s'
|
||||||
|
FSP_T_DATA = b'fsp_t'
|
||||||
|
|
||||||
# The expected size for the device tree in some tests
|
# The expected size for the device tree in some tests
|
||||||
EXTRACT_DTB_SIZE = 0x3c9
|
EXTRACT_DTB_SIZE = 0x3c9
|
||||||
@@ -149,6 +151,8 @@ class TestFunctional(unittest.TestCase):
|
|||||||
TestFunctional._MakeInputFile('bmpblk.bin', BMPBLK_DATA)
|
TestFunctional._MakeInputFile('bmpblk.bin', BMPBLK_DATA)
|
||||||
TestFunctional._MakeInputFile('refcode.bin', REFCODE_DATA)
|
TestFunctional._MakeInputFile('refcode.bin', REFCODE_DATA)
|
||||||
TestFunctional._MakeInputFile('fsp_m.bin', FSP_M_DATA)
|
TestFunctional._MakeInputFile('fsp_m.bin', FSP_M_DATA)
|
||||||
|
TestFunctional._MakeInputFile('fsp_s.bin', FSP_S_DATA)
|
||||||
|
TestFunctional._MakeInputFile('fsp_t.bin', FSP_T_DATA)
|
||||||
|
|
||||||
cls._elf_testdir = os.path.join(cls._indir, 'elftest')
|
cls._elf_testdir = os.path.join(cls._indir, 'elftest')
|
||||||
elf_test.BuildElfTestFiles(cls._elf_testdir)
|
elf_test.BuildElfTestFiles(cls._elf_testdir)
|
||||||
@@ -3332,6 +3336,15 @@ class TestFunctional(unittest.TestCase):
|
|||||||
data = self._DoReadFile('152_intel_fsp_m.dts')
|
data = self._DoReadFile('152_intel_fsp_m.dts')
|
||||||
self.assertEqual(FSP_M_DATA, data[:len(FSP_M_DATA)])
|
self.assertEqual(FSP_M_DATA, data[:len(FSP_M_DATA)])
|
||||||
|
|
||||||
|
def testPackFspS(self):
|
||||||
|
"""Test that an image with a FSP silicon-init binary can be created"""
|
||||||
|
data = self._DoReadFile('153_intel_fsp_s.dts')
|
||||||
|
self.assertEqual(FSP_S_DATA, data[:len(FSP_S_DATA)])
|
||||||
|
|
||||||
|
def testPackFspT(self):
|
||||||
|
"""Test that an image with a FSP temp-ram-init binary can be created"""
|
||||||
|
data = self._DoReadFile('154_intel_fsp_t.dts')
|
||||||
|
self.assertEqual(FSP_T_DATA, data[:len(FSP_T_DATA)])
|
||||||
|
|
||||||
|
|
||||||
if __name__ == "__main__":
|
if __name__ == "__main__":
|
||||||
|
14
tools/binman/test/153_intel_fsp_s.dts
Normal file
14
tools/binman/test/153_intel_fsp_s.dts
Normal file
@@ -0,0 +1,14 @@
|
|||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/ {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
binman {
|
||||||
|
size = <16>;
|
||||||
|
|
||||||
|
intel-fsp-s {
|
||||||
|
filename = "fsp_s.bin";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
14
tools/binman/test/154_intel_fsp_t.dts
Normal file
14
tools/binman/test/154_intel_fsp_t.dts
Normal file
@@ -0,0 +1,14 @@
|
|||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/ {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
binman {
|
||||||
|
size = <16>;
|
||||||
|
|
||||||
|
intel-fsp-t {
|
||||||
|
filename = "fsp_t.bin";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
@@ -9,7 +9,7 @@ ENTRY(_start)
|
|||||||
|
|
||||||
SECTIONS
|
SECTIONS
|
||||||
{
|
{
|
||||||
. = 0x00000000;
|
. = 0x00000010;
|
||||||
_start = .;
|
_start = .;
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
|
Reference in New Issue
Block a user