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add: reading special purpose registers

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This commit is contained in:
Michal Simek
2007-05-08 15:57:43 +02:00
parent 1a50f164be
commit e69f66c6eb
3 changed files with 41 additions and 23 deletions
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41
common/cmd_mfsl.c
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@@ -350,22 +350,41 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
} }
int do_rmsr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{ {
unsigned int reg = 0;
unsigned int val = 0; unsigned int val = 0;
val = (unsigned int)simple_strtoul (argv[1], NULL, 16); reg = (unsigned int)simple_strtoul (argv[1], NULL, 16);
val = (unsigned int)simple_strtoul (argv[2], NULL, 16);
if (argc < 1) { if (argc < 1) {
printf ("Usage:\n%s\n", cmdtp->usage); printf ("Usage:\n%s\n", cmdtp->usage);
return 1; return 1;
} }
if (argc > 1) { switch (reg) {
MTS (val); case 0x1:
MFS (val); if (argc > 2) {
MTS (val, rmsr);
NOP;
MFS (val, rmsr);
} else { } else {
MFS (val); MFS (val, rmsr);
} }
printf ("rmsr: 0x%08lx\n", val); puts ("MSR");
break;
case 0x3:
MFS (val, rear);
puts ("EAR");
break;
case 0x5:
MFS (val, resr);
puts ("ESR");
break;
default:
return 1;
}
printf (": 0x%08lx\n", val);
return 0; return 0;
} }
@@ -388,7 +407,11 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr,
" 2 - blocking data write\n" " 2 - blocking data write\n"
" 3 - blocking control write\n"); " 3 - blocking control write\n");
U_BOOT_CMD (rmsr, 2, 1, do_rmsr, U_BOOT_CMD (rspr, 3, 1, do_rspr,
"rmsr - read MSR register\n", "- read MSR register.\n"); "rmsr - read/write special purpose register\n",
"- reg_num [write value] read/write special purpose register\n"
" 0 - MSR - Machine status register\n"
" 1 - EAR - Exception address register\n"
" 2 - ESR - Exception status register\n");
#endif /* CONFIG_MICROBLAZE & CFG_CMD_MFSL */ #endif /* CONFIG_MICROBLAZE & CFG_CMD_MFSL */

4
cpu/microblaze/exception.c
View File

@@ -30,9 +30,9 @@ void _hw_exception_handler (void)
int address = 0; int address = 0;
int state = 0; int state = 0;
/* loading address of exception EAR */ /* loading address of exception EAR */
MFSEAR(address); MFS (address, rear);
/* loading excetpion state register ESR */ /* loading excetpion state register ESR */
MFSESR(state); MFS (state, resr);
printf ("Hardware exception at 0x%x address\n", address); printf ("Hardware exception at 0x%x address\n", address);
switch (state & 0x1f) { /* mask on exception cause */ switch (state & 0x1f) { /* mask on exception cause */
case 0x1: case 0x1:

17
include/asm-microblaze/asm.h
View File

@@ -49,23 +49,18 @@
/* CPU dependent */ /* CPU dependent */
/* machine status register */ /* machine status register */
#define MFS(val) \ #define MFS(val, reg) \
__asm__ __volatile__ ("mfs %0, rmsr":"=r" (val)); __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
#define MTS(val) \ #define MTS(val, reg) \
__asm__ __volatile__ ("mts rmsr, %0"::"r" (val)); __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
/* exception status register */
#define MFSEAR(val) \
__asm__ __volatile ("mfs %0,rear":"=r" (val));
#define MFSESR(val) \
__asm__ __volatile ("mfs %0,resr":"=r" (val));
/* get return address from interrupt */ /* get return address from interrupt */
#define R14(val) \ #define R14(val) \
__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val)); __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
#define NOP __asm__ __volatile__ ("nop");
/* use machine status registe USE_MSR_REG */ /* use machine status registe USE_MSR_REG */
#ifdef XILINX_USE_MSR_INSTR #ifdef XILINX_USE_MSR_INSTR
#define MSRSET(val) \ #define MSRSET(val) \