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global: Migrate CONFIG_SCIF_A to CFG
Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -274,7 +274,7 @@ U_BOOT_DRIVER(serial_sh) = {
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# error "Default SCIF doesn't set....."
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# error "Default SCIF doesn't set....."
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#endif
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#endif
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#if defined(CONFIG_SCIF_A)
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#if defined(CFG_SCIF_A)
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#define SCIF_BASE_PORT PORT_SCIFA
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#define SCIF_BASE_PORT PORT_SCIFA
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#elif defined(CONFIG_SCI)
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#elif defined(CONFIG_SCI)
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#define SCIF_BASE_PORT PORT_SCI
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#define SCIF_BASE_PORT PORT_SCI
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@@ -92,7 +92,7 @@ struct uart_port {
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# define SCIF_ORER 0x0001 /* overrun error bit */
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# define SCIF_ORER 0x0001 /* overrun error bit */
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#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_GEN3) || \
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#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_GEN3) || \
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defined(CONFIG_R7S72100)
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defined(CONFIG_R7S72100)
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# if defined(CONFIG_SCIF_A)
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# if defined(CFG_SCIF_A)
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# define SCIF_ORER 0x0200
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# define SCIF_ORER 0x0200
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# else
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# else
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# define SCIF_ORER 0x0001
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# define SCIF_ORER 0x0001
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@@ -164,7 +164,7 @@ struct uart_port {
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# define SCIF2_TXROOM_MAX 16
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# define SCIF2_TXROOM_MAX 16
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#elif defined(CONFIG_RCAR_GEN2)
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#elif defined(CONFIG_RCAR_GEN2)
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# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
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# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
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# if defined(CONFIG_SCIF_A)
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# if defined(CFG_SCIF_A)
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# define SCIF_RFDC_MASK 0x007f
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# define SCIF_RFDC_MASK 0x007f
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# else
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# else
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# define SCIF_RFDC_MASK 0x001f
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# define SCIF_RFDC_MASK 0x001f
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@@ -380,7 +380,7 @@ SCIF_FNS(SCFDR, 0, 0, 0x1C, 16)
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SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
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SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
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SCIF_FNS(DL, 0, 0, 0x30, 16)
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SCIF_FNS(DL, 0, 0, 0x30, 16)
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SCIF_FNS(CKS, 0, 0, 0x34, 16)
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SCIF_FNS(CKS, 0, 0, 0x34, 16)
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#if defined(CONFIG_SCIF_A)
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#if defined(CFG_SCIF_A)
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SCIF_FNS(SCLSR, 0, 0, 0x14, 16)
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SCIF_FNS(SCLSR, 0, 0, 0x14, 16)
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#else
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#else
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SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
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SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
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@@ -491,7 +491,7 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
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#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
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#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
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#elif defined(CONFIG_RCAR_GEN2)
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#elif defined(CONFIG_RCAR_GEN2)
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#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
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#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
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#if defined(CONFIG_SCIF_A)
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#if defined(CFG_SCIF_A)
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#define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */
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#define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */
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#else
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#else
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#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
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#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
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@@ -23,7 +23,7 @@
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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/* SCIF */
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/* SCIF */
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#define CONFIG_SCIF_A
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#define CFG_SCIF_A
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/* SH Ether */
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_USE_PORT 0
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