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armv8: ls1046afrwy: Add support for LS1046AFRWY platform

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LS1046AFRWY board supports LS1046A family SoCs. This patch
add base support for this board.
Board support's 4GB ddr memory, i2c, micro-click module,microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
This commit is contained in:
Vabhav Sharma
2019-06-06 12:35:28 +00:00
committed by Prabhakar Kushwaha
parent 196fa2efbe
commit d90c7ac7a9
16 changed files with 730 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
include/fm_eth.h
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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2009-2012 Freescale Semiconductor, Inc.
* Copyright 2019 NXP
*/
#ifndef __FM_ETH_H__
@@ -41,8 +42,19 @@ enum fm_eth_type {
FM_ETH_10G_E,
};
/* Historically, on FMan v3 platforms, the first MDIO bus has been used for
* Clause 22 PHYs and the second MDIO bus for 10G Clause 45 PHYs (thus the
* TGEC name).
*
* On LS1046A-FRWY, the QSGMII PHY is connected to the second MDIO bus,
* and no TGEC ports are present on-board.
*/
#ifdef CONFIG_SYS_FMAN_V3
#ifdef CONFIG_TARGET_LS1046AFRWY
#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000)
#else
#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfc000)
#endif
#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000)
#if (CONFIG_SYS_NUM_FMAN == 2)
#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfc000)