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fpga: virtex2: Avoid CamelCase

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No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek
2014-03-13 11:33:36 +01:00
parent 2a6e3869f2
commit d9071ce0a8
5 changed files with 44 additions and 44 deletions
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4
board/gen860t/fpga.c
View File

@@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Note that these are pointers to code that is in Flash. They will be /* Note that these are pointers to code that is in Flash. They will be
* relocated at runtime. * relocated at runtime.
*/ */
Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = { xilinx_virtex2_slave_selectmap_fns fpga_fns = {
fpga_pre_config_fn, fpga_pre_config_fn,
fpga_pgm_fn, fpga_pgm_fn,
fpga_init_fn, fpga_init_fn,
@@ -57,7 +57,7 @@ Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = {
}; };
Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
{Xilinx_Virtex2, {xilinx_virtex2,
slave_selectmap, slave_selectmap,
XILINX_XC2V3000_SIZE, XILINX_XC2V3000_SIZE,
(void *) &fpga_fns, (void *) &fpga_fns,

34
drivers/fpga/virtex2.c
View File

@@ -84,25 +84,25 @@
#define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */ #define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */
#endif #endif
static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;
switch (desc->iface) { switch (desc->iface) {
case slave_serial: case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__); PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
ret_val = Virtex2_ss_load (desc, buf, bsize); ret_val = virtex2_ss_load(desc, buf, bsize);
break; break;
case slave_selectmap: case slave_selectmap:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__); PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
ret_val = Virtex2_ssm_load (desc, buf, bsize); ret_val = virtex2_ssm_load(desc, buf, bsize);
break; break;
default: default:
@@ -112,19 +112,19 @@ int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val; return ret_val;
} }
int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;
switch (desc->iface) { switch (desc->iface) {
case slave_serial: case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__); PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
ret_val = Virtex2_ss_dump (desc, buf, bsize); ret_val = virtex2_ss_dump(desc, buf, bsize);
break; break;
case slave_parallel: case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__); PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
ret_val = Virtex2_ssm_dump (desc, buf, bsize); ret_val = virtex2_ssm_dump(desc, buf, bsize);
break; break;
default: default:
@@ -134,7 +134,7 @@ int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val; return ret_val;
} }
int Virtex2_info (Xilinx_desc * desc) int virtex2_info(Xilinx_desc *desc)
{ {
return FPGA_SUCCESS; return FPGA_SUCCESS;
} }
@@ -153,10 +153,10 @@ int Virtex2_info (Xilinx_desc * desc)
* INIT_B and DONE lines. If both are high, configuration has * INIT_B and DONE lines. If both are high, configuration has
* succeeded. Congratulations! * succeeded. Congratulations!
*/ */
static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;
Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns; xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
PRINTF ("%s:%d: Start with interface functions @ 0x%p\n", PRINTF ("%s:%d: Start with interface functions @ 0x%p\n",
__FUNCTION__, __LINE__, fn); __FUNCTION__, __LINE__, fn);
@@ -352,10 +352,10 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/* /*
* Read the FPGA configuration data * Read the FPGA configuration data
*/ */
static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;
Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns; xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
if (fn) { if (fn) {
unsigned char *data = (unsigned char *) buf; unsigned char *data = (unsigned char *) buf;
@@ -404,13 +404,13 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val; return ret_val;
} }
static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{ {
printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__); printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
return FPGA_FAIL; return FPGA_FAIL;
} }
static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{ {
printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__); printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
return FPGA_FAIL; return FPGA_FAIL;

14
drivers/fpga/xilinx.c
View File

@@ -169,11 +169,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__); __FUNCTION__);
#endif #endif
break; break;
case Xilinx_Virtex2: case xilinx_virtex2:
#if defined(CONFIG_FPGA_VIRTEX2) #if defined(CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Loader...\n", PRINTF ("%s: Launching the Virtex-II Loader...\n",
__FUNCTION__); __FUNCTION__);
ret_val = Virtex2_load (desc, buf, bsize); ret_val = virtex2_load(desc, buf, bsize);
#else #else
printf ("%s: No support for Virtex-II devices.\n", printf ("%s: No support for Virtex-II devices.\n",
__FUNCTION__); __FUNCTION__);
@@ -226,11 +226,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__); __FUNCTION__);
#endif #endif
break; break;
case Xilinx_Virtex2: case xilinx_virtex2:
#if defined( CONFIG_FPGA_VIRTEX2) #if defined( CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Reader...\n", PRINTF ("%s: Launching the Virtex-II Reader...\n",
__FUNCTION__); __FUNCTION__);
ret_val = Virtex2_dump (desc, buf, bsize); ret_val = virtex2_dump(desc, buf, bsize);
#else #else
printf ("%s: No support for Virtex-II devices.\n", printf ("%s: No support for Virtex-II devices.\n",
__FUNCTION__); __FUNCTION__);
@@ -268,7 +268,7 @@ int xilinx_info (Xilinx_desc * desc)
case xilinx_spartan3: case xilinx_spartan3:
printf ("Spartan-III\n"); printf ("Spartan-III\n");
break; break;
case Xilinx_Virtex2: case xilinx_virtex2:
printf ("Virtex-II\n"); printf ("Virtex-II\n");
break; break;
case xilinx_zynq: case xilinx_zynq:
@@ -334,9 +334,9 @@ int xilinx_info (Xilinx_desc * desc)
__FUNCTION__); __FUNCTION__);
#endif #endif
break; break;
case Xilinx_Virtex2: case xilinx_virtex2:
#if defined(CONFIG_FPGA_VIRTEX2) #if defined(CONFIG_FPGA_VIRTEX2)
Virtex2_info (desc); virtex2_info(desc);
#else #else
/* just in case */ /* just in case */
printf ("%s: No support for Virtex-II devices.\n", printf ("%s: No support for Virtex-II devices.\n",

34
include/virtex2.h
View File

@@ -11,9 +11,9 @@
#include <xilinx.h> #include <xilinx.h>
extern int Virtex2_load(Xilinx_desc *desc, const void *image, size_t size); int virtex2_load(Xilinx_desc *desc, const void *image, size_t size);
extern int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
extern int Virtex2_info(Xilinx_desc *desc); int virtex2_info(Xilinx_desc *desc);
/* /*
* Slave SelectMap Implementation function table. * Slave SelectMap Implementation function table.
@@ -32,7 +32,7 @@ typedef struct {
Xilinx_busy_fn busy; Xilinx_busy_fn busy;
Xilinx_abort_fn abort; Xilinx_abort_fn abort;
Xilinx_post_fn post; Xilinx_post_fn post;
} Xilinx_Virtex2_Slave_SelectMap_fns; } xilinx_virtex2_slave_selectmap_fns;
/* Slave Serial Implementation function table */ /* Slave Serial Implementation function table */
typedef struct { typedef struct {
@@ -40,7 +40,7 @@ typedef struct {
Xilinx_clk_fn clk; Xilinx_clk_fn clk;
Xilinx_rdata_fn rdata; Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata; Xilinx_wdata_fn wdata;
} Xilinx_Virtex2_Slave_Serial_fns; } xilinx_virtex2_slave_serial_fns;
/* Device Image Sizes (in bytes) /* Device Image Sizes (in bytes)
*********************************************************************/ *********************************************************************/
@@ -60,39 +60,39 @@ typedef struct {
/* Descriptor Macros /* Descriptor Macros
*********************************************************************/ *********************************************************************/
#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie }
#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie }
#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie }
#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie }
#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie }
#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie }
#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie }
#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie }
#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie }
#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie }
#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie }
#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie } { xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }
#endif /* _VIRTEX2_H_ */ #endif /* _VIRTEX2_H_ */

2
include/xilinx.h
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@@ -28,7 +28,7 @@ typedef enum { /* typedef Xilinx_Family */
min_xilinx_type, /* low range check value */ min_xilinx_type, /* low range check value */
xilinx_spartan2, /* Spartan-II Family */ xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */ Xilinx_VirtexE, /* Virtex-E Family */
Xilinx_Virtex2, /* Virtex2 Family */ xilinx_virtex2, /* Virtex2 Family */
xilinx_spartan3, /* Spartan-III Family */ xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */ xilinx_zynq, /* Zynq Family */
max_xilinx_type /* insert all new types before this */ max_xilinx_type /* insert all new types before this */