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imx: Add variscite DART-6UL Evaluation Kit

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Port for the DART-6UL Evaluation Kit SBC. Based on the variscite
DART-6UL iMX6ULL SoM.

CPU:   Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 43C
Reset cause: POR
Model: Variscite DART-6UL Evaluation Kit
Board: Variscite DART-6UL Evaluation Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial@02020000
Out:   serial@02020000
Err:   serial@02020000
Net:   FEC0

Working:
 - Eth0
 - i2c
 - MMC/SD
 - eMMC
 - USB host
 - UART 1

Note: LCDIF porting needs DM_VIDEO
https://lists.denx.de/pipermail/u-boot/2019-April/365506.html

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
This commit is contained in:
Parthiban Nallathambi
2019-04-18 00:04:09 +02:00
committed by Stefano Babic
parent b3cf86c86b
commit d8d33b6d4d
13 changed files with 1008 additions and 0 deletions
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12
arch/arm/mach-imx/mx6/Kconfig
View File

@@ -161,6 +161,18 @@ config TARGET_COLIBRI_IMX6ULL
select DM_THERMAL
select MX6ULL
config TARGET_DART_6UL
bool "Variscite imx6ULL dart(DART-SOM-6ULL)"
select MX6ULL
select DM
select DM_ETH
select DM_GPIO
select DM_I2C
select DM_MMC
select DM_SERIAL
select DM_THERMAL
select SUPPORT_SPL
config TARGET_DHCOMIMX6
bool "dh_imx6"
select BOARD_EARLY_INIT_F