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arm: lpc32xx: Remove unused hsuart driver

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This driver is not enabled in any config currently, remove it.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-11-19 18:45:24 -05:00
parent 68e54040cc
commit d5596cbc6e
5 changed files with 0 additions and 155 deletions
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8
arch/arm/include/asm/arch-lpc32xx/config.h
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@@ -11,14 +11,6 @@
/* Basic CPU architecture */ /* Basic CPU architecture */
/* UART configuration */
#if (CONFIG_CONS_INDEX == 1) || (CONFIG_CONS_INDEX == 2) || \
(CONFIG_CONS_INDEX == 7)
#if !defined(CONFIG_LPC32XX_HSUART)
#define CONFIG_LPC32XX_HSUART
#endif
#endif
#if !defined(CFG_SYS_NS16550_CLK) #if !defined(CFG_SYS_NS16550_CLK)
#define CFG_SYS_NS16550_CLK 13000000 #define CFG_SYS_NS16550_CLK 13000000
#endif #endif

16
arch/arm/mach-lpc32xx/devices.c
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@@ -6,7 +6,6 @@
#include <common.h> #include <common.h>
#include <dm.h> #include <dm.h>
#include <ns16550.h> #include <ns16550.h>
#include <dm/platform_data/lpc32xx_hsuart.h>
#include <asm/arch/clk.h> #include <asm/arch/clk.h>
#include <asm/arch/uart.h> #include <asm/arch/uart.h>
@@ -53,26 +52,11 @@ static const struct ns16550_plat lpc32xx_uart[] = {
.clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
}; };
#if defined(CONFIG_LPC32XX_HSUART)
static const struct lpc32xx_hsuart_plat lpc32xx_hsuart[] = {
{ HS_UART1_BASE, },
{ HS_UART2_BASE, },
{ HS_UART7_BASE, },
};
#endif
U_BOOT_DRVINFOS(lpc32xx_uarts) = { U_BOOT_DRVINFOS(lpc32xx_uarts) = {
#if defined(CONFIG_LPC32XX_HSUART)
{ "lpc32xx_hsuart", &lpc32xx_hsuart[0], },
{ "lpc32xx_hsuart", &lpc32xx_hsuart[1], },
#endif
{ "ns16550_serial", &lpc32xx_uart[0], }, { "ns16550_serial", &lpc32xx_uart[0], },
{ "ns16550_serial", &lpc32xx_uart[1], }, { "ns16550_serial", &lpc32xx_uart[1], },
{ "ns16550_serial", &lpc32xx_uart[2], }, { "ns16550_serial", &lpc32xx_uart[2], },
{ "ns16550_serial", &lpc32xx_uart[3], }, { "ns16550_serial", &lpc32xx_uart[3], },
#if defined(CONFIG_LPC32XX_HSUART)
{ "lpc32xx_hsuart", &lpc32xx_hsuart[2], },
#endif
}; };
#endif #endif

1
drivers/serial/Makefile
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@@ -38,7 +38,6 @@ obj-$(CONFIG_COREBOOT_SERIAL) += serial_coreboot.o
obj-$(CONFIG_CORTINA_UART) += serial_cortina.o obj-$(CONFIG_CORTINA_UART) += serial_cortina.o
obj-$(CONFIG_DEBUG_SBI_CONSOLE) += serial_sbi.o obj-$(CONFIG_DEBUG_SBI_CONSOLE) += serial_sbi.o
obj-$(CONFIG_EFI_APP) += serial_efi.o obj-$(CONFIG_EFI_APP) += serial_efi.o
obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
obj-$(CONFIG_MCFUART) += serial_mcf.o obj-$(CONFIG_MCFUART) += serial_mcf.o
obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_SYS_NS16550) += ns16550.o
obj-$(CONFIG_S5P_SERIAL) += serial_s5p.o obj-$(CONFIG_S5P_SERIAL) += serial_s5p.o

112
drivers/serial/lpc32xx_hsuart.c
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@@ -1,112 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
*/
#include <common.h>
#include <clock_legacy.h>
#include <dm.h>
#include <serial.h>
#include <dm/platform_data/lpc32xx_hsuart.h>
#include <asm/arch/uart.h>
#include <linux/compiler.h>
struct lpc32xx_hsuart_priv {
struct hsuart_regs *hsuart;
};
static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
{
struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
struct hsuart_regs *hsuart = priv->hsuart;
u32 div;
/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
if (div > 255)
div = 255;
writel(div, &hsuart->rate);
return 0;
}
static int lpc32xx_serial_getc(struct udevice *dev)
{
struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
struct hsuart_regs *hsuart = priv->hsuart;
if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
return -EAGAIN;
return readl(&hsuart->rx) & HSUART_RX_DATA;
}
static int lpc32xx_serial_putc(struct udevice *dev, const char c)
{
struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
struct hsuart_regs *hsuart = priv->hsuart;
/* Wait for empty FIFO */
if (readl(&hsuart->level) & HSUART_LEVEL_TX)
return -EAGAIN;
writel(c, &hsuart->tx);
return 0;
}
static int lpc32xx_serial_pending(struct udevice *dev, bool input)
{
struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
struct hsuart_regs *hsuart = priv->hsuart;
if (input) {
if (readl(&hsuart->level) & HSUART_LEVEL_RX)
return 1;
} else {
if (readl(&hsuart->level) & HSUART_LEVEL_TX)
return 1;
}
return 0;
}
static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
{
/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
&hsuart->ctrl);
return 0;
}
static int lpc32xx_hsuart_probe(struct udevice *dev)
{
struct lpc32xx_hsuart_plat *plat = dev_get_plat(dev);
struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
priv->hsuart = (struct hsuart_regs *)plat->base;
lpc32xx_serial_init(priv->hsuart);
return 0;
}
static const struct dm_serial_ops lpc32xx_hsuart_ops = {
.setbrg = lpc32xx_serial_setbrg,
.getc = lpc32xx_serial_getc,
.putc = lpc32xx_serial_putc,
.pending = lpc32xx_serial_pending,
};
U_BOOT_DRIVER(lpc32xx_hsuart) = {
.name = "lpc32xx_hsuart",
.id = UCLASS_SERIAL,
.probe = lpc32xx_hsuart_probe,
.ops = &lpc32xx_hsuart_ops,
.priv_auto = sizeof(struct lpc32xx_hsuart_priv),
.flags = DM_FLAG_PRE_RELOC,
};

18
include/dm/platform_data/lpc32xx_hsuart.h
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@@ -1,18 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2015 Vladimir Zapolskiy <vz@mleia.com>
*/
#ifndef _LPC32XX_HSUART_PLAT_H
#define _LPC32XX_HSUART_PLAT_H
/**
* struct lpc32xx_hsuart_plat - NXP LPC32xx HSUART platform data
*
* @base: Base register address
*/
struct lpc32xx_hsuart_plat {
unsigned long base;
};
#endif