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armv8: ls1088ardb: Enable USB command RDB qspi-boot

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Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ran Wang
2017-10-23 10:09:24 +08:00
committed by York Sun
parent 90be2fe37e
commit d4c746c7b1
3 changed files with 23 additions and 1 deletions
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14
arch/arm/dts/fsl-ls1088a.dtsi
View File

@@ -76,6 +76,20 @@
num-cs = <4>; num-cs = <4>;
}; };
usb0: usb3@3100000 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <0 80 0x4>; /* Level high type */
dr_mode = "host";
};
usb1: usb3@3110000 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x3110000 0x0 0x10000>;
interrupts = <0 81 0x4>; /* Level high type */
dr_mode = "host";
};
pcie@3400000 { pcie@3400000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie"; compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */ reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */

8
configs/ls1088ardb_qspi_defconfig
View File

@@ -31,3 +31,11 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y CONFIG_FSL_DSPI=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_STORAGE=y

2
include/linux/usb/xhci-fsl.h
View File

@@ -58,7 +58,7 @@ struct fsl_xhci {
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
#elif defined(CONFIG_ARCH_LS2080A) #elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0