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MMC: DWMMC: Correct the CLKDIV register value

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This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)

Input parameter to mmc_clk is changed to dwmci_host, since
we need the same to read DWMCI_CLKSEL register.

This improves the read timing values for channel 0 on SMDK5250
from 0.288sec to 0.144sec

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
This commit is contained in:
Rajeshwari S Shinde
2014-02-05 10:48:15 +05:30
committed by Pantelis Antoniou
parent def816a2ba
commit d3e016cc28
4 changed files with 21 additions and 4 deletions
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2
include/dwmmc.h
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@@ -142,7 +142,7 @@ struct dwmci_host {
void (*clksel)(struct dwmci_host *host);
void (*board_init)(struct dwmci_host *host);
unsigned int (*get_mmc_clk)(int dev_index);
unsigned int (*get_mmc_clk)(struct dwmci_host *host);
};
struct dwmci_idmac {