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fsl_ddr: Move DDR config options to driver Kconfig

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Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
York Sun
2016-12-28 08:43:40 -08:00
committed by Tom Rini
parent a105503851
commit d26e34c4c4
138 changed files with 262 additions and 237 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
View File

@@ -770,6 +770,7 @@ config TARGET_LS1021AQDS
select ARCH_LS1021A select ARCH_LS1021A
select ARCH_SUPPORT_PSCI select ARCH_SUPPORT_PSCI
select LS1_DEEP_SLEEP select LS1_DEEP_SLEEP
select SYS_FSL_DDR
config TARGET_LS1021ATWR config TARGET_LS1021ATWR
bool "Support ls1021atwr" bool "Support ls1021atwr"

47
arch/arm/cpu/armv7/ls102xa/Kconfig
View File

@@ -3,8 +3,10 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A010315 select SYS_FSL_ERRATUM_A010315
select SYS_FSL_SRDS_1 select SYS_FSL_SRDS_1
select SYS_HAS_SERDES select SYS_HAS_SERDES
select SYS_FSL_DDR_BE select SYS_FSL_DDR_BE if SYS_FSL_DDR
select SYS_FSL_DDR_VER_50 select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE select SYS_FSL_SEC_LE
@@ -49,47 +51,6 @@ config SYS_FSL_SRDS_2
config SYS_HAS_SERDES config SYS_HAS_SERDES
bool bool
config SYS_FSL_DDR
bool "Freescale DDR driver"
help
Select Freescale General DDR driver, shared between most Freescale
PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
based Layerscape SoCs (such as ls2080a).
config SYS_FSL_DDR_BE
bool
default y
help
Access DDR registers in big-endian.
config SYS_FSL_DDR_VER
int
default 50 if SYS_FSL_DDR_VER_50
config SYS_FSL_DDR_VER_50
bool
config SYS_FSL_DDRC_ARM_GEN3
bool
config SYS_FSL_DDRC_GEN4
bool
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on !SYS_FSL_DDR4
select SYS_FSL_DDR
select SYS_FSL_DDRC_ARM_GEN3
help
Enable Freescale DDR3 controller on ARM-based SoCs.
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
select SYS_FSL_DDR
select SYS_FSL_DDRC_GEN4
help
Enable Freescale DDR4 controller.
config SYS_FSL_IFC_BANK_COUNT config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller" int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1021A depends on ARCH_LS1021A

57
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
View File

@@ -8,28 +8,33 @@ config ARCH_LS1012A
config ARCH_LS1043A config ARCH_LS1043A
bool bool
select FSL_LSCH2 select FSL_LSCH2
select SYS_FSL_DDR
select SYS_FSL_DDR_BE select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50 select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A010315 select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010539 select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
config ARCH_LS1046A config ARCH_LS1046A
bool bool
select FSL_LSCH2 select FSL_LSCH2
select SYS_FSL_DDR
select SYS_FSL_DDR_BE select SYS_FSL_DDR_BE
select SYS_FSL_DDR4
select SYS_FSL_DDR_VER_50 select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A010539 select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2 select SYS_FSL_SRDS_2
config ARCH_LS2080A config ARCH_LS2080A
bool bool
select FSL_LSCH3 select FSL_LSCH3
select SYS_FSL_DDR4 select SYS_FSL_DDR
select SYS_FSL_DDR_LE select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50 select SYS_FSL_DDR_VER_50
select SYS_FSL_HAS_DP_DDR select SYS_FSL_HAS_DP_DDR
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_HAS_DDR4
select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE select SYS_FSL_SEC_LE
select SYS_FSL_SRDS_2 select SYS_FSL_SRDS_2
@@ -71,9 +76,6 @@ config FSL_PPA_ARMV8_PSCI
implemented under the common ARMv8 PSCI framework. implemented under the common ARMv8 PSCI framework.
endmenu endmenu
config SYS_FSL_MMDC
bool
config SYS_FSL_ERRATUM_A010315 config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315" bool "Workaround for PCIe erratum A010315"
@@ -129,49 +131,4 @@ config SYS_FSL_SRDS_2
config SYS_HAS_SERDES config SYS_HAS_SERDES
bool bool
config SYS_FSL_DDR
bool "Freescale DDR driver"
help
Select Freescale General DDR driver, shared between most Freescale
PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
based Layerscape SoCs (such as ls2080a).
config SYS_FSL_DDR_BE
bool
help
Access DDR registers in big-endian.
config SYS_FSL_DDR_LE
bool
help
Access DDR registers in little-endian.
config SYS_FSL_DDR_VER
int
default 50 if SYS_FSL_DDR_VER_50
config SYS_FSL_DDR_VER_50
bool
config SYS_FSL_DDRC_ARM_GEN3
bool
config SYS_FSL_DDRC_GEN4
bool
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on !SYS_FSL_DDR4
select SYS_FSL_DDR
select SYS_FSL_DDRC_ARM_GEN3
help
Enable Freescale DDR3 controller on ARM-based SoCs.
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
select SYS_FSL_DDR
select SYS_FSL_DDRC_GEN4
help
Enable Freescale DDR4 controller.
endmenu endmenu

4
arch/arm/include/asm/arch-fsl-layerscape/config.h
View File

@@ -175,11 +175,11 @@
#define CONFIG_SYS_FSL_ERRATUM_A009942 #define CONFIG_SYS_FSL_ERRATUM_A009942
#define CONFIG_SYS_FSL_ERRATUM_A009660 #define CONFIG_SYS_FSL_ERRATUM_A009660
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#elif defined(CONFIG_ARCH_LS1012A)
#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
#elif defined(CONFIG_ARCH_LS1012A)
#define GICD_BASE 0x01401000 #define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000 #define GICC_BASE 0x01402000
#elif defined(CONFIG_ARCH_LS1046A) #elif defined(CONFIG_ARCH_LS1046A)
#define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FMAN 1

4
arch/powerpc/Kconfig
View File

@@ -30,9 +30,13 @@ config MPC83xx
config MPC85xx config MPC85xx
bool "MPC85xx" bool "MPC85xx"
select CREATE_ARCH_SYMLINK select CREATE_ARCH_SYMLINK
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
config MPC86xx config MPC86xx
bool "MPC86xx" bool "MPC86xx"
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
config 8xx config 8xx
bool "MPC8xx" bool "MPC8xx"

3
arch/powerpc/cpu/mpc83xx/Kconfig
View File

@@ -38,6 +38,9 @@ config TARGET_MPC832XEMDS
config TARGET_MPC8349EMDS config TARGET_MPC8349EMDS
bool "Support MPC8349EMDS" bool "Support MPC8349EMDS"
select SYS_FSL_DDR
select SYS_FSL_HAS_DDR2
select SYS_FSL_DDR_BE
config TARGET_MPC8349ITX config TARGET_MPC8349ITX
bool "Support MPC8349ITX" bool "Support MPC8349ITX"

52
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@@ -68,6 +68,8 @@ config TARGET_P5040DS
config TARGET_MPC8536DS config TARGET_MPC8536DS
bool "Support MPC8536DS" bool "Support MPC8536DS"
select ARCH_MPC8536 select ARCH_MPC8536
# Use DDR3 controller with DDR2 DIMMs on this board
select SYS_FSL_DDRC_GEN3
config TARGET_MPC8540ADS config TARGET_MPC8540ADS
bool "Support MPC8540ADS" bool "Support MPC8540ADS"
@@ -104,6 +106,8 @@ config TARGET_MPC8569MDS
config TARGET_MPC8572DS config TARGET_MPC8572DS
bool "Support MPC8572DS" bool "Support MPC8572DS"
select ARCH_MPC8572 select ARCH_MPC8572
# Use DDR3 controller with DDR2 DIMMs on this board
select SYS_FSL_DDRC_GEN3
config TARGET_P1010RDB_PA config TARGET_P1010RDB_PA
bool "Support P1010RDB_PA" bool "Support P1010RDB_PA"
@@ -300,6 +304,8 @@ config TARGET_XPEDITE520X
config TARGET_XPEDITE537X config TARGET_XPEDITE537X
bool "Support xpedite537x" bool "Support xpedite537x"
select ARCH_MPC8572 select ARCH_MPC8572
# Use DDR3 controller with DDR2 DIMMs on this board
select SYS_FSL_DDRC_GEN3
config TARGET_XPEDITE550X config TARGET_XPEDITE550X
bool "Support xpedite550x" bool "Support xpedite550x"
@@ -325,6 +331,7 @@ config ARCH_B4420
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -333,6 +340,7 @@ config ARCH_B4860
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -340,6 +348,7 @@ config ARCH_B4860
config ARCH_BSC9131 config ARCH_BSC9131
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -347,6 +356,7 @@ config ARCH_BSC9131
config ARCH_BSC9132 config ARCH_BSC9132
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -355,6 +365,7 @@ config ARCH_BSC9132
config ARCH_C29X config ARCH_C29X
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_6 select SYS_FSL_SEC_COMPAT_6
@@ -363,6 +374,8 @@ config ARCH_C29X
config ARCH_MPC8536 config ARCH_MPC8536
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -371,10 +384,12 @@ config ARCH_MPC8536
config ARCH_MPC8540 config ARCH_MPC8540
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR1
config ARCH_MPC8541 config ARCH_MPC8541
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -382,6 +397,7 @@ config ARCH_MPC8541
config ARCH_MPC8544 config ARCH_MPC8544
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -390,6 +406,8 @@ config ARCH_MPC8544
config ARCH_MPC8548 config ARCH_MPC8548
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -398,6 +416,7 @@ config ARCH_MPC8548
config ARCH_MPC8555 config ARCH_MPC8555
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -405,10 +424,12 @@ config ARCH_MPC8555
config ARCH_MPC8560 config ARCH_MPC8560
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR1
config ARCH_MPC8568 config ARCH_MPC8568
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -416,6 +437,7 @@ config ARCH_MPC8568
config ARCH_MPC8569 config ARCH_MPC8569
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -423,14 +445,17 @@ config ARCH_MPC8569
config ARCH_MPC8572 config ARCH_MPC8572
bool bool
select FSL_LAW select FSL_LAW
select SYS_PPC_E500_USE_DEBUG_TLB select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
config ARCH_P1010 config ARCH_P1010
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -439,6 +464,7 @@ config ARCH_P1010
config ARCH_P1011 config ARCH_P1011
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -447,6 +473,7 @@ config ARCH_P1011
config ARCH_P1020 config ARCH_P1020
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -455,6 +482,7 @@ config ARCH_P1020
config ARCH_P1021 config ARCH_P1021
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -463,6 +491,7 @@ config ARCH_P1021
config ARCH_P1022 config ARCH_P1022
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -471,6 +500,7 @@ config ARCH_P1022
config ARCH_P1023 config ARCH_P1023
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -478,6 +508,7 @@ config ARCH_P1023
config ARCH_P1024 config ARCH_P1024
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -486,6 +517,7 @@ config ARCH_P1024
config ARCH_P1025 config ARCH_P1025
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -494,6 +526,7 @@ config ARCH_P1025
config ARCH_P2020 config ARCH_P2020
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2 select SYS_FSL_SEC_COMPAT_2
@@ -503,6 +536,7 @@ config ARCH_P2041
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -511,6 +545,7 @@ config ARCH_P3041
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -519,6 +554,7 @@ config ARCH_P4080
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -527,6 +563,7 @@ config ARCH_P5020
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -535,6 +572,7 @@ config ARCH_P5040
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -546,6 +584,8 @@ config ARCH_T1023
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_COMPAT_5
@@ -554,6 +594,8 @@ config ARCH_T1024
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_COMPAT_5
@@ -562,6 +604,8 @@ config ARCH_T1040
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_COMPAT_5
@@ -570,6 +614,8 @@ config ARCH_T1042
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_COMPAT_5
@@ -578,6 +624,7 @@ config ARCH_T2080
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -586,6 +633,7 @@ config ARCH_T2081
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -594,6 +642,7 @@ config ARCH_T4160
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4
@@ -602,6 +651,7 @@ config ARCH_T4240
bool bool
select E500MC select E500MC
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_COMPAT_4

4
arch/powerpc/cpu/mpc86xx/Kconfig
View File

@@ -29,10 +29,14 @@ endchoice
config ARCH_MPC8610 config ARCH_MPC8610
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_DDR2
config ARCH_MPC8641 config ARCH_MPC8641
bool bool
select FSL_LAW select FSL_LAW
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_DDR2
config FSL_LAW config FSL_LAW
bool bool

3
arch/powerpc/include/asm/config.h
View File

@@ -9,16 +9,13 @@
#ifdef CONFIG_MPC85xx #ifdef CONFIG_MPC85xx
#include <asm/config_mpc85xx.h> #include <asm/config_mpc85xx.h>
#define CONFIG_SYS_FSL_DDR
#endif #endif
#ifdef CONFIG_MPC86xx #ifdef CONFIG_MPC86xx
#include <asm/config_mpc86xx.h> #include <asm/config_mpc86xx.h>
#define CONFIG_SYS_FSL_DDR
#endif #endif
#ifdef CONFIG_MPC83xx #ifdef CONFIG_MPC83xx
#define CONFIG_SYS_FSL_DDR
#endif #endif
#ifndef HWCONFIG_BUFFER_SIZE #ifndef HWCONFIG_BUFFER_SIZE

21
arch/powerpc/include/asm/config_mpc85xx.h
View File

@@ -16,7 +16,6 @@
#define CONFIG_PPC_SPINTABLE_COMPATIBLE #define CONFIG_PPC_SPINTABLE_COMPATIBLE
#include <fsl_ddrc_version.h> #include <fsl_ddrc_version.h>
#define CONFIG_SYS_FSL_DDR_BE
/* IP endianness */ /* IP endianness */
#define CONFIG_SYS_FSL_IFC_BE #define CONFIG_SYS_FSL_IFC_BE
@@ -28,17 +27,13 @@
#define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_A005125
#elif defined(CONFIG_ARCH_MPC8540) #elif defined(CONFIG_ARCH_MPC8540)
#define CONFIG_SYS_FSL_DDRC_GEN1
#elif defined(CONFIG_ARCH_MPC8541) #elif defined(CONFIG_ARCH_MPC8541)
#define CONFIG_SYS_FSL_DDRC_GEN1
#elif defined(CONFIG_ARCH_MPC8544) #elif defined(CONFIG_ARCH_MPC8544)
#define CONFIG_SYS_FSL_DDRC_GEN2
#define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_A005125
#elif defined(CONFIG_ARCH_MPC8548) #elif defined(CONFIG_ARCH_MPC8548)
#define CONFIG_SYS_FSL_DDRC_GEN2
#define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 #define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
#define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 #define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
#define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 #define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
@@ -52,13 +47,10 @@
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x00 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
#elif defined(CONFIG_ARCH_MPC8555) #elif defined(CONFIG_ARCH_MPC8555)
#define CONFIG_SYS_FSL_DDRC_GEN1
#elif defined(CONFIG_ARCH_MPC8560) #elif defined(CONFIG_ARCH_MPC8560)
#define CONFIG_SYS_FSL_DDRC_GEN1
#elif defined(CONFIG_ARCH_MPC8568) #elif defined(CONFIG_ARCH_MPC8568)
#define CONFIG_SYS_FSL_DDRC_GEN2
#define QE_MURAM_SIZE 0x10000UL #define QE_MURAM_SIZE 0x10000UL
#define MAX_QE_RISC 2 #define MAX_QE_RISC 2
#define QE_NUM_OF_SNUM 28 #define QE_NUM_OF_SNUM 28
@@ -544,9 +536,6 @@
#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
#ifdef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_FSL_DDRC_GEN4
#endif
#define CONFIG_SYS_FSL_NUM_CC_PLLS 2 #define CONFIG_SYS_FSL_NUM_CC_PLLS 2
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 } #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 }
#define CONFIG_SYS_FSL_SRDS_1 #define CONFIG_SYS_FSL_SRDS_1
@@ -588,9 +577,6 @@
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
#define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FMAN_V3
#ifdef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_FSL_DDRC_GEN4
#endif
#define CONFIG_SYS_FSL_NUM_CC_PLL 2 #define CONFIG_SYS_FSL_NUM_CC_PLL 2
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 } #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 }
#define CONFIG_SYS_FSL_SRDS_1 #define CONFIG_SYS_FSL_SRDS_1
@@ -697,13 +683,6 @@
#define CONFIG_SYS_FSL_THREADS_PER_CORE 1 #define CONFIG_SYS_FSL_THREADS_PER_CORE 1
#endif #endif
#if !defined(CONFIG_SYS_FSL_DDRC_GEN1) && \
!defined(CONFIG_SYS_FSL_DDRC_GEN2) && \
!defined(CONFIG_SYS_FSL_DDRC_GEN3) && \
!defined(CONFIG_SYS_FSL_DDRC_GEN4)
#define CONFIG_SYS_FSL_DDRC_GEN3
#endif
#if !defined(CONFIG_ARCH_C29X) #if !defined(CONFIG_ARCH_C29X)
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#endif #endif

2
arch/powerpc/include/asm/config_mpc86xx.h
View File

@@ -7,6 +7,4 @@
#ifndef _ASM_MPC86xx_CONFIG_H_ #ifndef _ASM_MPC86xx_CONFIG_H_
#define _ASM_MPC86xx_CONFIG_H_ #define _ASM_MPC86xx_CONFIG_H_
#define CONFIG_SYS_FSL_DDR_86XX
#endif /* _ASM_MPC85xx_CONFIG_H_ */ #endif /* _ASM_MPC85xx_CONFIG_H_ */

1
configs/MPC8536DS_36BIT_defconfig
View File

@@ -16,6 +16,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/MPC8536DS_SDCARD_defconfig
View File

@@ -16,6 +16,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/MPC8536DS_SPIFLASH_defconfig
View File

@@ -16,6 +16,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/MPC8536DS_defconfig
View File

@@ -15,6 +15,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/MPC8572DS_36BIT_defconfig
View File

@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_MII=y CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y

1
configs/MPC8572DS_defconfig
View File

@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_MII=y CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y

1
configs/T1023RDB_SECURE_BOOT_defconfig
View File

@@ -7,6 +7,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SECURE_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y

1
configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
View File

@@ -8,7 +8,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

1
configs/T1024QDS_DDR4_defconfig
View File

@@ -6,7 +6,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

1
configs/T1024QDS_NAND_defconfig
View File

@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1024QDS_SDCARD_defconfig
View File

@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1024QDS_SECURE_BOOT_defconfig
View File

@@ -24,6 +24,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1024QDS_SPIFLASH_defconfig
View File

@@ -32,6 +32,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1024QDS_defconfig
View File

@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1024RDB_NAND_defconfig
View File

@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1024RDB_SDCARD_defconfig
View File

@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1024RDB_SECURE_BOOT_defconfig
View File

@@ -23,6 +23,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1024RDB_SPIFLASH_defconfig
View File

@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1024RDB_defconfig
View File

@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

2
configs/T1040D4RDB_NAND_defconfig
View File

@@ -12,7 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y

2
configs/T1040D4RDB_SDCARD_defconfig
View File

@@ -12,7 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y

1
configs/T1040D4RDB_SECURE_BOOT_defconfig
View File

@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y

2
configs/T1040D4RDB_SPIFLASH_defconfig
View File

@@ -13,7 +13,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y

1
configs/T1040D4RDB_defconfig
View File

@@ -5,7 +5,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y

1
configs/T1040QDS_DDR4_defconfig
View File

@@ -6,7 +6,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

1
configs/T1040QDS_SECURE_BOOT_defconfig
View File

@@ -24,6 +24,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1040QDS_defconfig
View File

@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/T1040RDB_NAND_defconfig
View File

@@ -29,6 +29,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1040RDB_SDCARD_defconfig
View File

@@ -29,6 +29,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1040RDB_SECURE_BOOT_defconfig
View File

@@ -22,6 +22,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1040RDB_SPIFLASH_defconfig
View File

@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1040RDB_defconfig
View File

@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

2
configs/T1042D4RDB_NAND_defconfig
View File

@@ -13,7 +13,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

2
configs/T1042D4RDB_SDCARD_defconfig
View File

@@ -13,7 +13,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

1
configs/T1042D4RDB_SECURE_BOOT_defconfig
View File

@@ -8,7 +8,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

2
configs/T1042D4RDB_SPIFLASH_defconfig
View File

@@ -14,7 +14,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

1
configs/T1042D4RDB_defconfig
View File

@@ -6,7 +6,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

1
configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
View File

@@ -36,6 +36,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1042RDB_PI_NAND_defconfig
View File

@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1042RDB_PI_SDCARD_defconfig
View File

@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1042RDB_PI_SPIFLASH_defconfig
View File

@@ -32,6 +32,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1042RDB_PI_defconfig
View File

@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1042RDB_SECURE_BOOT_defconfig
View File

@@ -22,6 +22,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/T1042RDB_defconfig
View File

@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/ls1021aqds_ddr4_nor_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_VIDEO=y CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y

1
configs/ls1021aqds_ddr4_nor_lpuart_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_VIDEO=y CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
CONFIG_FIT=y CONFIG_FIT=y

2
configs/ls1021aqds_nand_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y
@@ -38,6 +37,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_PCI=y CONFIG_PCI=y

2
configs/ls1021aqds_nor_SECURE_BOOT_defconfig
View File

@@ -1,7 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SECURE_BOOT=y CONFIG_SECURE_BOOT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_VIDEO=y CONFIG_VIDEO=y
# CONFIG_SYS_MALLOC_F is not set # CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT=y CONFIG_FIT=y
@@ -27,6 +26,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_PCI=y CONFIG_PCI=y

2
configs/ls1021aqds_nor_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_VIDEO=y CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
@@ -27,6 +26,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_PCI=y CONFIG_PCI=y

2
configs/ls1021aqds_nor_lpuart_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_VIDEO=y CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
CONFIG_FIT=y CONFIG_FIT=y
@@ -28,6 +27,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_PCI=y CONFIG_PCI=y

2
configs/ls1021aqds_qspi_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_VIDEO=y CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
@@ -31,6 +30,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

2
configs/ls1021aqds_sdcard_ifc_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y
@@ -39,6 +38,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_PCI=y CONFIG_PCI=y

2
configs/ls1021aqds_sdcard_qspi_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y
@@ -41,6 +40,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y

1
configs/ls1043aqds_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

1
configs/ls1043aqds_lpuart_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

1
configs/ls1043aqds_nand_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y

2
configs/ls1043aqds_nor_ddr3_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
@@ -24,6 +23,7 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y

1
configs/ls1043aqds_qspi_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

1
configs/ls1043aqds_sdcard_ifc_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y

1
configs/ls1043aqds_sdcard_qspi_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y

1
configs/ls1043ardb_SECURE_BOOT_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

1
configs/ls1043ardb_defconfig
View File

@@ -1,6 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

1
configs/ls1043ardb_nand_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y

1
configs/ls1043ardb_sdcard_defconfig
View File

@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_FSL_DDR4=y
CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y

1
configs/ls1046aqds_defconfig
View File

@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y

2
configs/ls1046aqds_nand_defconfig
View File

@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_NAND_BOOT=y CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y

1
configs/ls1046aqds_qspi_defconfig
View File

@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_QSPI_BOOT=y CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y

2
configs/ls1046aqds_sdcard_ifc_defconfig
View File

@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y

2
configs/ls1046aqds_sdcard_qspi_defconfig
View File

@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y

2
configs/ls1046ardb_emmc_defconfig
View File

@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4,EMMC_BOOT" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT"
CONFIG_SD_BOOT=y CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y

1
configs/ls1046ardb_qspi_defconfig
View File

@@ -5,7 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_QSPI_BOOT=y CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y

2
configs/ls1046ardb_sdcard_defconfig
View File

@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y

2
configs/ls2080a_emu_defconfig
View File

@@ -6,7 +6,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="EMU,LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CONSOLE is not set

2
configs/ls2080aqds_SECURE_BOOT_defconfig
View File

@@ -6,7 +6,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y

2
configs/ls2080aqds_defconfig
View File

@@ -6,7 +6,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y

2
configs/ls2080aqds_nand_defconfig
View File

@@ -12,7 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

2
configs/ls2080aqds_qspi_defconfig
View File

@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT,LS2080A" CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,LS2080A"
CONFIG_QSPI_BOOT=y CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y

2
configs/ls2080ardb_SECURE_BOOT_defconfig
View File

@@ -6,7 +6,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y

2
configs/ls2080ardb_defconfig
View File

@@ -6,7 +6,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y

2
configs/ls2080ardb_nand_defconfig
View File

@@ -12,7 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

1
configs/xpedite537x_defconfig
View File

@@ -15,5 +15,6 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y CONFIG_CMD_MII=y
CONFIG_CMD_PING=y CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y CONFIG_CMD_SNTP=y
CONFIG_SYS_FSL_DDR2=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT=y

2
drivers/Kconfig
View File

@@ -16,6 +16,8 @@ source "drivers/crypto/Kconfig"
source "drivers/demo/Kconfig" source "drivers/demo/Kconfig"
source "drivers/ddr/fsl/Kconfig"
source "drivers/dfu/Kconfig" source "drivers/dfu/Kconfig"
source "drivers/dma/Kconfig" source "drivers/dma/Kconfig"

122
drivers/ddr/fsl/Kconfig Normal file
View File

@@ -0,0 +1,122 @@
config SYS_FSL_DDR
bool
help
Select Freescale General DDR driver, shared between most Freescale
PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
based Layerscape SoCs (such as ls2080a).
config SYS_FSL_MMDC
bool
help
Select Freescale Multi Mode DDR controller (MMDC).
config SYS_FSL_DDR_BE
bool
help
Access DDR registers in big-endian
config SYS_FSL_DDR_LE
bool
help
Access DDR registers in little-endian
menu "Freescale DDR controllers"
depends on SYS_FSL_DDR
config SYS_FSL_DDR_VER
int
default 50 if SYS_FSL_DDR_VER_50
default 47 if SYS_FSL_DDR_VER_47
default 46 if SYS_FSL_DDR_VER_46
default 44 if SYS_FSL_DDR_VER_44
config SYS_FSL_DDR_VER_50
bool
config SYS_FSL_DDR_VER_47
bool
config SYS_FSL_DDR_VER_46
bool
config SYS_FSL_DDR_VER_44
bool
config SYS_FSL_DDRC_GEN1
bool
help
Enable Freescale DDR controller.
config SYS_FSL_DDRC_GEN2
bool
depends on !MPC86xx
help
Enable Freescale DDR2 controller.
config SYS_FSL_DDRC_86XX_GEN2
bool
depends on MPC86xx
help
Enable Freescale DDR2 controller for MPC86xx SoCs.
config SYS_FSL_DDRC_GEN3
bool
depends on PPC
help
Enable Freescale DDR3 controller for PowerPC SoCs.
config SYS_FSL_DDRC_ARM_GEN3
bool
depends on ARM
help
Enable Freescale DDR3 controller for ARM SoCs.
config SYS_FSL_DDRC_GEN4
bool
help
Enable Freescale DDR4 controller.
config SYS_FSL_HAS_DDR4
bool
config SYS_FSL_HAS_DDR3
bool
config SYS_FSL_HAS_DDR2
bool
config SYS_FSL_HAS_DDR1
bool
choice
prompt "DDR technology"
default SYS_FSL_DDR4 if SYS_FSL_HAS_DDR4
default SYS_FSL_DDR3 if SYS_FSL_HAS_DDR3
default SYS_FSL_DDR2 if SYS_FSL_HAS_DDR2
default SYS_FSL_DDR1 if SYS_FSL_HAS_DDR1
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
depends on SYS_FSL_HAS_DDR4
select SYS_FSL_DDRC_GEN4
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on SYS_FSL_HAS_DDR3
select SYS_FSL_DDRC_GEN3 if PPC
select SYS_FSL_DDRC_ARM_GEN3 if ARM
config SYS_FSL_DDR2
bool "Freescale DDR2 controller"
depends on SYS_FSL_HAS_DDR2
select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
select SYS_FSL_DDRC_86XX_GEN2 if MPC86xx
config SYS_FSL_DDR1
bool "Freescale DDR1 controller"
depends on SYS_FSL_HAS_DDR1
select SYS_FSL_DDRC_GEN1
endchoice
endmenu

2
drivers/ddr/fsl/Makefile
View File

@@ -30,7 +30,7 @@ obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o
obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o
obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o
obj-$(CONFIG_SYS_FSL_DDR_86XX) += mpc86xx_ddr.o obj-$(CONFIG_SYS_FSL_DDRC_86XX_GEN2) += mpc86xx_ddr.o
obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o
obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o
obj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o obj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o

1
include/configs/B4860QDS.h
View File

@@ -228,7 +228,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DDR_SPD #define CONFIG_DDR_SPD
#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_SYS_FSL_DDR3
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_FSL_DDR_INTERACTIVE
#endif #endif

1
include/configs/BSC9131RDB.h
View File

@@ -70,7 +70,6 @@
#define CONFIG_SYS_MEMTEST_END 0x01ffffff #define CONFIG_SYS_MEMTEST_END 0x01ffffff
/* DDR Setup */ /* DDR Setup */
#define CONFIG_SYS_FSL_DDR3
#undef CONFIG_SYS_DDR_RAW_TIMING #undef CONFIG_SYS_DDR_RAW_TIMING
#undef CONFIG_DDR_SPD #undef CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SPD_BUS_NUM 0

1
include/configs/BSC9132QDS.h
View File

@@ -125,7 +125,6 @@
#define CONFIG_SYS_MEMTEST_END 0x01ffffff #define CONFIG_SYS_MEMTEST_END 0x01ffffff
/* DDR Setup */ /* DDR Setup */
#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */ #define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */
#define SPD_EEPROM_ADDRESS2 0x56 /* I2C access */ #define SPD_EEPROM_ADDRESS2 0x56 /* I2C access */

1
include/configs/C29XPCIE.h
View File

@@ -126,7 +126,6 @@
#define CONFIG_PANIC_HANG #define CONFIG_PANIC_HANG
/* DDR Setup */ /* DDR Setup */
#define CONFIG_SYS_FSL_DDR3
#define CONFIG_DDR_SPD #define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x50 #define SPD_EEPROM_ADDRESS 0x50

8
include/configs/MPC8349EMDS.h
View File

@@ -60,12 +60,9 @@
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/* /*
* define CONFIG_SYS_FSL_DDR2 to use unified DDR driver * SYS_FSL_DDR2 is selected in Kconfig to use unified DDR driver
* undefine it to use old spd_sdram.c * unselect it to use old spd_sdram.c
*/ */
#define CONFIG_SYS_FSL_DDR2
#ifdef CONFIG_SYS_FSL_DDR2
#define CONFIG_SYS_FSL_DDRC_GEN2
#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS1 0x52 #define SPD_EEPROM_ADDRESS1 0x52
#define SPD_EEPROM_ADDRESS2 0x51 #define SPD_EEPROM_ADDRESS2 0x51
@@ -74,7 +71,6 @@
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#endif
/* /*
* 32-bit data path mode. * 32-bit data path mode.

Some files were not shown because too many files have changed in this diff Show More