dm: serial: use Driver Model for UniPhier serial driver

This commit converts UniPhier on-chip serial driver to driver model.

Since UniPhier SoCs do not have Device Tree support, some board files
should be added under arch/arm/cpu/armv7/uniphier/ph1-*/ directories.
(Device Tree support for UniPhier platform is still under way.)

Now the base address and master clock frequency are passed from
platform data, so CONFIG_SYS_UNIPHIER_SERIAL_BASE* and
CONFIG_SYS_UNIPHIER_UART_CLK should be removed.

Tested on UniPhier PH1-LD4 ref board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile

@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
+obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o bcu_init.o \
 		sbc_init.o sg_init.o pll_init.o clkrst_init.o pinctrl.o

arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arch/platdevice.h>
+
+#define UART_MASTER_CLK		36864000
+
+SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
+SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
+SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
+SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)

arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile

@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
+obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o sbc_init.o \
 				sg_init.o pll_init.o clkrst_init.o pinctrl.o

arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arch/platdevice.h>
+
+#define UART_MASTER_CLK		73728000
+
+SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
+SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
+SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
+SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)

arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile

@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
+obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o bcu_init.o \
 		sbc_init.o sg_init.o pll_init.o clkrst_init.o pinctrl.o

arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arch/platdevice.h>
+
+#define UART_MASTER_CLK		80000000
+
+SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
+SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
+SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
+SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)

arch/arm/include/asm/arch-uniphier/platdevice.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef ARCH_PLATDEVICE_H
+#define ARCH_PLATDEVICE_H
+
+#include <dm/platdata.h>
+#include <dm/platform_data/serial-uniphier.h>
+
+#define SERIAL_DEVICE(n, ba, clk)					\
+static struct uniphier_serial_platform_data serial_device##n = {	\
+	.base = ba,							\
+	.uartclk = clk							\
+};									\
+U_BOOT_DEVICE(serial##n) = {						\
+	.name = DRIVER_NAME,						\
+	.platdata = &serial_device##n					\
+};
+
+#endif /* ARCH_PLATDEVICE_H */

configs/ph1_ld4_defconfig

@@ -2,7 +2,9 @@ CONFIG_SPL=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_UNIPHIER=y
 +S:CONFIG_MACH_PH1_LD4=y
+CONFIG_DM=y
 CONFIG_NAND_DENALI=y
 CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_DM_SERIAL=y
 S:CONFIG_SPL_NAND_DENALI=y

configs/ph1_pro4_defconfig

@@ -2,7 +2,9 @@ CONFIG_SPL=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_UNIPHIER=y
 +S:CONFIG_MACH_PH1_PRO4=y
+CONFIG_DM=y
 CONFIG_NAND_DENALI=y
 CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_DM_SERIAL=y
 S:CONFIG_SPL_NAND_DENALI=y

configs/ph1_sld8_defconfig

@@ -2,7 +2,9 @@ CONFIG_SPL=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_UNIPHIER=y
 +S:CONFIG_MACH_PH1_SLD8=y
+CONFIG_DM=y
 CONFIG_NAND_DENALI=y
 CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_DM_SERIAL=y
 S:CONFIG_SPL_NAND_DENALI=y

drivers/serial/serial_uniphier.c

@@ -2,14 +2,14 @@
  * Copyright (C) 2012-2014 Panasonic Corporation
  *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
  *
- * Based on serial_ns16550.c
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <dm/device.h>
+#include <dm/platform_data/serial-uniphier.h>
 #include <serial.h>
 
 #define UART_REG(x)					\
@@ -48,157 +48,104 @@ struct uniphier_serial {
 #define UART_LSR_DR	0x01		/* Data ready */
 #define UART_LSR_THRE	0x20		/* Xmit holding register empty */
 
-DECLARE_GLOBAL_DATA_PTR;
+struct uniphier_serial_private_data {
+	struct uniphier_serial __iomem *membase;
+};
 
-static void uniphier_serial_init(struct uniphier_serial *port)
+#define uniphier_serial_port(dev)	\
+	((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
+
+int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
 {
+	struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
+	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
 	const unsigned int mode_x_div = 16;
 	unsigned int divisor;
 
 	writeb(UART_LCR_WLS_8, &port->lcr);
 
-	divisor = DIV_ROUND_CLOSEST(CONFIG_SYS_UNIPHIER_UART_CLK,
+	divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
-						mode_x_div * gd->baudrate);
 
 	writew(divisor, &port->dlr);
+
+	return 0;
 }
 
-static void uniphier_serial_setbrg(struct uniphier_serial *port)
+static int uniphier_serial_getc(struct udevice *dev)
 {
-	uniphier_serial_init(port);
+	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
-}
 
-static int uniphier_serial_tstc(struct uniphier_serial *port)
+	if (!(readb(&port->lsr) & UART_LSR_DR))
-{
+		return -EAGAIN;
-	return (readb(&port->lsr) & UART_LSR_DR) != 0;
-}
-
-static int uniphier_serial_getc(struct uniphier_serial *port)
-{
-	while (!uniphier_serial_tstc(port))
-		;
 
 	return readb(&port->rbr);
 }
 
-static void uniphier_serial_putc(struct uniphier_serial *port, const char c)
+static int uniphier_serial_putc(struct udevice *dev, const char c)
 {
-	if (c == '\n')
+	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
-		uniphier_serial_putc(port, '\r');
 
-	while (!(readb(&port->lsr) & UART_LSR_THRE))
+	if (!(readb(&port->lsr) & UART_LSR_THRE))
-		;
+		return -EAGAIN;
 
 	writeb(c, &port->thr);
+
+	return 0;
 }
 
-static struct uniphier_serial *serial_ports[4] = {
+int uniphier_serial_probe(struct udevice *dev)
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE0
+{
-	(struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE0,
+	struct uniphier_serial_private_data *priv = dev_get_priv(dev);
-#else
+	struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
-	NULL,
+
-#endif
+	priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial));
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE1
+
-	(struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE1,
+	if (!priv->membase)
-#else
+		return -ENOMEM;
-	NULL,
+
-#endif
+	return 0;
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE2
+}
-	(struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE2,
+
-#else
+int uniphier_serial_remove(struct udevice *dev)
-	NULL,
+{
-#endif
+	unmap_sysmem(uniphier_serial_port(dev));
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE3
+
-	(struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE3,
+	return 0;
-#else
+}
-	NULL,
+
-#endif
+#ifdef CONFIG_OF_CONTROL
+static const struct udevice_id uniphier_uart_of_match = {
+	{ .compatible = "panasonic,uniphier-uart"},
+	{},
 };
 
-/* Multi serial device functions */
+static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
-#define DECLARE_ESERIAL_FUNCTIONS(port) \
-	static int  eserial##port##_init(void) \
-	{ \
-		uniphier_serial_init(serial_ports[port]); \
-		return 0 ; \
-	} \
-	static void eserial##port##_setbrg(void) \
-	{ \
-		uniphier_serial_setbrg(serial_ports[port]); \
-	} \
-	static int  eserial##port##_getc(void) \
-	{ \
-		return uniphier_serial_getc(serial_ports[port]); \
-	} \
-	static int  eserial##port##_tstc(void) \
-	{ \
-		return uniphier_serial_tstc(serial_ports[port]); \
-	} \
-	static void eserial##port##_putc(const char c) \
-	{ \
-		uniphier_serial_putc(serial_ports[port], c); \
-	}
-
-/* Serial device descriptor */
-#define INIT_ESERIAL_STRUCTURE(port, __name) {	\
-	.name	= __name,			\
-	.start	= eserial##port##_init,		\
-	.stop	= NULL,				\
-	.setbrg	= eserial##port##_setbrg,	\
-	.getc	= eserial##port##_getc,		\
-	.tstc	= eserial##port##_tstc,		\
-	.putc	= eserial##port##_putc,		\
-	.puts	= default_serial_puts,		\
-}
-
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE0)
-DECLARE_ESERIAL_FUNCTIONS(0);
-struct serial_device uniphier_serial0_device =
-	INIT_ESERIAL_STRUCTURE(0, "ttyS0");
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE1)
-DECLARE_ESERIAL_FUNCTIONS(1);
-struct serial_device uniphier_serial1_device =
-	INIT_ESERIAL_STRUCTURE(1, "ttyS1");
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE2)
-DECLARE_ESERIAL_FUNCTIONS(2);
-struct serial_device uniphier_serial2_device =
-	INIT_ESERIAL_STRUCTURE(2, "ttyS2");
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE3)
-DECLARE_ESERIAL_FUNCTIONS(3);
-struct serial_device uniphier_serial3_device =
-	INIT_ESERIAL_STRUCTURE(3, "ttyS3");
-#endif
-
-__weak struct serial_device *default_serial_console(void)
 {
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE0)
+	/*
-	return &uniphier_serial0_device;
+	 * TODO: Masahiro Yamada (yamada.m@jp.panasonic.com)
-#elif defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE1)
+	 *
-	return &uniphier_serial1_device;
+	 * Implement conversion code from DTB to platform data
-#elif defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE2)
+	 * when supporting CONFIG_OF_CONTROL on UniPhir platform.
-	return &uniphier_serial2_device;
+	 */
-#elif defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE3)
-	return &uniphier_serial3_device;
-#else
-#error "No uniphier serial ports configured."
-#endif
 }
+#endif
 
-void uniphier_serial_initialize(void)
+static const struct dm_serial_ops uniphier_serial_ops = {
-{
+	.setbrg = uniphier_serial_setbrg,
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE0)
+	.getc = uniphier_serial_getc,
-	serial_register(&uniphier_serial0_device);
+	.putc = uniphier_serial_putc,
-#endif
+};
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE1)
+
-	serial_register(&uniphier_serial1_device);
+U_BOOT_DRIVER(uniphier_serial) = {
-#endif
+	.name = DRIVER_NAME,
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE2)
+	.id = UCLASS_SERIAL,
-	serial_register(&uniphier_serial2_device);
+	.of_match = of_match_ptr(uniphier_uart_of_match),
-#endif
+	.ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE3)
+	.probe = uniphier_serial_probe,
-	serial_register(&uniphier_serial3_device);
+	.remove = uniphier_serial_remove,
-#endif
+	.priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
-}
+	.platdata_auto_alloc_size =
+				sizeof(struct uniphier_serial_platform_data),
+	.ops = &uniphier_serial_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};

include/configs/ph1_ld4.h

@@ -34,8 +34,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #endif
 
-#define CONFIG_SYS_UNIPHIER_UART_CLK    36864000
-
 #define CONFIG_SMC911X
 
 #define CONFIG_DDR_NUM_CH0 1

include/configs/ph1_pro4.h

@@ -34,8 +34,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #endif
 
-#define CONFIG_SYS_UNIPHIER_UART_CLK    73728000
-
 #define CONFIG_SMC911X
 
 #define CONFIG_DDR_NUM_CH0 2

include/configs/ph1_sld8.h

@@ -34,8 +34,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #endif
 
-#define CONFIG_SYS_UNIPHIER_UART_CLK    80000000
-
 #define CONFIG_SMC911X
 
 #define CONFIG_DDR_NUM_CH0 1

include/configs/uniphier-common.h

@@ -33,18 +33,17 @@ are defined. Select only one of them."
 # define CONFIG_SUPPORT_CARD_UART_BASE	(CONFIG_SUPPORT_CARD_BASE + 0x00200000)
 #endif
 
+#ifdef CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_COM1		CONFIG_SUPPORT_CARD_UART_BASE
 #define CONFIG_SYS_NS16550_CLK		12288000
 #define CONFIG_SYS_NS16550_REG_SIZE	-2
+#endif
 
 #define CONFIG_SMC911X_BASE		CONFIG_SUPPORT_CARD_ETHER_BASE
 #define CONFIG_SMC911X_32_BIT
 
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE0 0x54006800
+#define CONFIG_SYS_MALLOC_F_LEN  0x7000
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE1 0x54006900
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE2 0x54006a00
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE3 0x54006b00
 
 /*-----------------------------------------------------------------------
  * MMU and Cache Setting

include/dm/platform_data/serial-uniphier.h

@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __PLAT_UNIPHIER_SERIAL_H
+#define __PLAT_UNIPHIER_SERIAL_H
+
+#define DRIVER_NAME	"uniphier-uart"
+
+struct uniphier_serial_platform_data {
+	unsigned long base;
+	unsigned int uartclk;
+};
+
+#endif /* __PLAT_UNIPHIER_SERIAL_H */