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Merge branch 'master' of git://git.denx.de/u-boot-sunxi

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This commit is contained in:
Tom Rini
2019-01-24 15:30:48 -05:00
parent 68489ed037 543049ab59
commit d01806a8fc
151 changed files with 3320 additions and 1000 deletions
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96
arch/arm/include/asm/arch-sunxi/ccu.h Normal file
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@@ -0,0 +1,96 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Amarula Solutions.
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
#ifndef _ASM_ARCH_CCU_H
#define _ASM_ARCH_CCU_H
/**
* enum ccu_flags - ccu clock/reset flags
*
* @CCU_CLK_F_IS_VALID: is given clock gate is valid?
* @CCU_RST_F_IS_VALID: is given reset control is valid?
*/
enum ccu_flags {
CCU_CLK_F_IS_VALID = BIT(0),
CCU_RST_F_IS_VALID = BIT(1),
};
/**
* struct ccu_clk_gate - ccu clock gate
* @off: gate offset
* @bit: gate bit
* @flags: ccu clock gate flags
*/
struct ccu_clk_gate {
u16 off;
u32 bit;
enum ccu_flags flags;
};
#define GATE(_off, _bit) { \
.off = _off, \
.bit = _bit, \
.flags = CCU_CLK_F_IS_VALID, \
}
/**
* struct ccu_reset - ccu reset
* @off: reset offset
* @bit: reset bit
* @flags: ccu reset control flags
*/
struct ccu_reset {
u16 off;
u32 bit;
enum ccu_flags flags;
};
#define RESET(_off, _bit) { \
.off = _off, \
.bit = _bit, \
.flags = CCU_RST_F_IS_VALID, \
}
/**
* struct ccu_desc - clock control unit descriptor
*
* @gates: clock gates
* @resets: reset unit
*/
struct ccu_desc {
const struct ccu_clk_gate *gates;
const struct ccu_reset *resets;
};
/**
* struct ccu_priv - sunxi clock control unit
*
* @base: base address
* @desc: ccu descriptor
*/
struct ccu_priv {
void *base;
const struct ccu_desc *desc;
};
/**
* sunxi_clk_probe - common sunxi clock probe
* @dev: clock device
*/
int sunxi_clk_probe(struct udevice *dev);
extern struct clk_ops sunxi_clk_ops;
/**
* sunxi_reset_bind() - reset binding
*
* @dev: reset device
* @count: reset count
* @return 0 success, or error value
*/
int sunxi_reset_bind(struct udevice *dev, ulong count);
#endif /* _ASM_ARCH_CCU_H */

3
arch/arm/include/asm/arch-sunxi/gpio.h
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@@ -176,6 +176,7 @@ enum sunxi_gpio_number {
#define SUN5I_GPE_SDC2 3
#define SUN8I_GPE_TWI2 3
#define SUN50I_GPE_TWI2 3
#define SUNXI_GPF_SDC0 2
#define SUNXI_GPF_UART0 4
@@ -193,8 +194,10 @@ enum sunxi_gpio_number {
#define SUN4I_GPH_SDC1 5
#define SUN6I_GPH_TWI0 2
#define SUN8I_GPH_TWI0 2
#define SUN50I_GPH_TWI0 2
#define SUN6I_GPH_TWI1 2
#define SUN8I_GPH_TWI1 2
#define SUN50I_GPH_TWI1 2
#define SUN6I_GPH_TWI2 2
#define SUN6I_GPH_UART0 2
#define SUN9I_GPH_UART0 2