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ARM: uniphier: parse device tree to determine DRAM base and size
Device tree specifies the available memory ranges in its "/memory" node. Use it to simplify the CONFIG defines. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@@ -18,15 +18,3 @@ int board_init(void)
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return 0;
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return 0;
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}
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}
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#if CONFIG_NR_DRAM_BANKS >= 2
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void dram_init_banksize(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_dram[0].start = CONFIG_SDRAM0_BASE;
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gd->bd->bi_dram[0].size = CONFIG_SDRAM0_SIZE;
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gd->bd->bi_dram[1].start = CONFIG_SDRAM1_BASE;
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gd->bd->bi_dram[1].size = CONFIG_SDRAM1_SIZE;
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}
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#endif
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@@ -1,16 +1,59 @@
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/*
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/*
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* Copyright (C) 2012-2015 Panasonic Corporation
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* Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <libfdt.h>
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#include <linux/err.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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{
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int offset;
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offset = fdt_path_offset(fdt, "/memory");
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if (offset < 0)
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return NULL;
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return fdt_getprop(fdt, offset, "reg", lenp);
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}
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int dram_init(void)
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int dram_init(void)
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{
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{
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DECLARE_GLOBAL_DATA_PTR;
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const fdt32_t *val;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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int len;
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val = get_memory_reg_prop(gd->fdt_blob, &len);
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if (len < sizeof(*val))
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return -EINVAL;
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gd->ram_size = fdt32_to_cpu(*(val + 1));
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debug("DRAM size = %08lx\n", gd->ram_size);
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return 0;
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return 0;
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}
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}
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void dram_init_banksize(void)
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{
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const fdt32_t *val;
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int len, i;
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val = get_memory_reg_prop(gd->fdt_blob, &len);
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if (len < 0)
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return;
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len /= sizeof(*val);
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len /= 2;
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for (i = 0; i < len; i++) {
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gd->bd->bi_dram[i].start = fdt32_to_cpu(*val++);
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gd->bd->bi_dram[i].size = fdt32_to_cpu(*val++);
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debug("DRAM bank %d: start = %08lx, size = %08lx\n",
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i, gd->bd->bi_dram[i].start, gd->bd->bi_dram[i].size);
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}
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}
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@@ -295,17 +295,8 @@
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/* Open Firmware flat tree */
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/* Open Firmware flat tree */
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#define CONFIG_OF_LIBFDT
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#define CONFIG_OF_LIBFDT
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/* Memory Size & Mapping */
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SDRAM0_BASE
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#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE >= CONFIG_SDRAM1_BASE
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/* Thre is no memory hole */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE + CONFIG_SDRAM1_SIZE)
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#else
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE)
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#endif
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#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
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#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
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defined(CONFIG_MACH_PH1_SLD8)
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defined(CONFIG_MACH_PH1_SLD8)
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