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	kirkwood: use c-struct for access to SDRAM addr decode registers
Remove the defines and do this with a C-struct. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>
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						 Prafulla Wadaskar
						Prafulla Wadaskar
					
				
			
			
				
	
			
			
			
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			| @@ -30,20 +30,29 @@ | |||||||
|  |  | ||||||
| DECLARE_GLOBAL_DATA_PTR; | DECLARE_GLOBAL_DATA_PTR; | ||||||
|  |  | ||||||
| #define KW_REG_CPUCS_WIN_BAR(x)		(KW_REGISTER(0x1500) + (x * 0x08)) | struct kw_sdram_bank { | ||||||
| #define KW_REG_CPUCS_WIN_SZ(x)		(KW_REGISTER(0x1504) + (x * 0x08)) | 	u32	win_bar; | ||||||
|  | 	u32	win_sz; | ||||||
|  | }; | ||||||
|  |  | ||||||
|  | struct kw_sdram_addr_dec { | ||||||
|  | 	struct kw_sdram_bank	sdram_bank[4]; | ||||||
|  | }; | ||||||
|  |  | ||||||
| /* | /* | ||||||
|  * kw_sdram_bar - reads SDRAM Base Address Register |  * kw_sdram_bar - reads SDRAM Base Address Register | ||||||
|  */ |  */ | ||||||
| u32 kw_sdram_bar(enum memory_bank bank) | u32 kw_sdram_bar(enum memory_bank bank) | ||||||
| { | { | ||||||
|  | 	struct kw_sdram_addr_dec *base = | ||||||
|  | 		(struct kw_sdram_addr_dec *)KW_REGISTER(0x1500); | ||||||
| 	u32 result = 0; | 	u32 result = 0; | ||||||
| 	u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank)); | 	u32 enable = 0x01 & readl(&base->sdram_bank[bank].win_sz); | ||||||
|  |  | ||||||
| 	if ((!enable) || (bank > BANK3)) | 	if ((!enable) || (bank > BANK3)) | ||||||
| 		return 0; | 		return 0; | ||||||
|  |  | ||||||
| 	result = readl(KW_REG_CPUCS_WIN_BAR(bank)); | 	result = readl(&base->sdram_bank[bank].win_bar); | ||||||
| 	return result; | 	return result; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -52,12 +61,14 @@ u32 kw_sdram_bar(enum memory_bank bank) | |||||||
|  */ |  */ | ||||||
| u32 kw_sdram_bs(enum memory_bank bank) | u32 kw_sdram_bs(enum memory_bank bank) | ||||||
| { | { | ||||||
|  | 	struct kw_sdram_addr_dec *base = | ||||||
|  | 		(struct kw_sdram_addr_dec *)KW_REGISTER(0x1500); | ||||||
| 	u32 result = 0; | 	u32 result = 0; | ||||||
| 	u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank)); | 	u32 enable = 0x01 & readl(&base->sdram_bank[bank].win_sz); | ||||||
|  |  | ||||||
| 	if ((!enable) || (bank > BANK3)) | 	if ((!enable) || (bank > BANK3)) | ||||||
| 		return 0; | 		return 0; | ||||||
| 	result = 0xff000000 & readl(KW_REG_CPUCS_WIN_SZ(bank)); | 	result = 0xff000000 & readl(&base->sdram_bank[bank].win_sz); | ||||||
| 	result += 0x01000000; | 	result += 0x01000000; | ||||||
| 	return result; | 	return result; | ||||||
| } | } | ||||||
|   | |||||||
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