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https://xff.cz/git/u-boot/
synced 2025-11-01 19:05:51 +01:00
@@ -704,7 +704,7 @@ config SYS_I2C_BUS_MAX
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depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA
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default 2 if TI816X
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default 3 if OMAP34XX || AM33XX || AM43XX
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default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
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default 4 if ARCH_SOCFPGA || OMAP44XX
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default 5 if OMAP54XX
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help
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Define the maximum number of available I2C buses.
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@@ -91,7 +91,7 @@ static uint _davinci_i2c_setspeed(struct i2c_regs *i2c_base,
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psc = 2;
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/* SCLL + SCLH */
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div = (CONFIG_SYS_HZ_CLOCK / ((psc + 1) * speed)) - 10;
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div = (CFG_SYS_HZ_CLOCK / ((psc + 1) * speed)) - 10;
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REG(&(i2c_base->i2c_psc)) = psc; /* 27MHz / (2 + 1) = 9MHz */
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REG(&(i2c_base->i2c_scll)) = (div * 50) / 100; /* 50% Duty */
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REG(&(i2c_base->i2c_sclh)) = div - REG(&(i2c_base->i2c_scll));
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@@ -41,7 +41,7 @@
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_M68K
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#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
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#define CONFIG_SYS_IMMR CFG_SYS_MBAR
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#endif
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#if !CONFIG_IS_ENABLED(DM_I2C)
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@@ -33,14 +33,14 @@ struct i2c_adapter *i2c_get_adapter(int index)
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return i2c_adap_p;
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}
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#if !defined(CONFIG_SYS_I2C_DIRECT_BUS)
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struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] =
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CONFIG_SYS_I2C_BUSES;
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#if !defined(CFG_SYS_I2C_DIRECT_BUS)
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struct i2c_bus_hose i2c_bus[CFG_SYS_NUM_I2C_BUSES] =
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CFG_SYS_I2C_BUSES;
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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#ifndef CFG_SYS_I2C_DIRECT_BUS
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/*
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* i2c_mux_set()
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* -------------
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@@ -114,7 +114,7 @@ static int i2c_mux_set_all(void)
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/* Connect requested bus if behind muxes */
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if (i2c_bus_tmp->next_hop[0].chip != 0) {
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/* Set all muxes along the path to that bus */
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for (i = 0; i < CONFIG_SYS_I2C_MAX_HOPS; i++) {
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for (i = 0; i < CFG_SYS_I2C_MAX_HOPS; i++) {
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int ret;
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if (i2c_bus_tmp->next_hop[i].chip == 0)
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@@ -143,7 +143,7 @@ static int i2c_mux_disconnect_all(void)
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/* Disconnect current bus (turn off muxes if any) */
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if ((i2c_bus_tmp->next_hop[0].chip != 0) &&
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(I2C_ADAP->init_done != 0)) {
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i = CONFIG_SYS_I2C_MAX_HOPS;
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i = CFG_SYS_I2C_MAX_HOPS;
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do {
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uint8_t chip;
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int ret;
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@@ -173,7 +173,7 @@ static int i2c_mux_disconnect_all(void)
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*/
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static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr)
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{
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if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES)
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if (bus_no >= CFG_SYS_NUM_I2C_BUSES)
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return;
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I2C_ADAP->init(I2C_ADAP, speed, slaveaddr);
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@@ -237,8 +237,8 @@ int i2c_set_bus_num(unsigned int bus)
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if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
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return 0;
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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if (bus >= CONFIG_SYS_NUM_I2C_BUSES)
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#ifndef CFG_SYS_I2C_DIRECT_BUS
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if (bus >= CFG_SYS_NUM_I2C_BUSES)
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return -1;
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#endif
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@@ -249,7 +249,7 @@ int i2c_set_bus_num(unsigned int bus)
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return -2;
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}
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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#ifndef CFG_SYS_I2C_DIRECT_BUS
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i2c_mux_disconnect_all();
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#endif
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@@ -257,7 +257,7 @@ int i2c_set_bus_num(unsigned int bus)
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if (I2C_ADAP->init_done == 0)
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i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr);
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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#ifndef CFG_SYS_I2C_DIRECT_BUS
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i2c_mux_set_all();
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#endif
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return 0;
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@@ -129,7 +129,7 @@ struct bcm_kona_i2c_dev {
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#define DEF_DEVICE(num) \
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{(void *)CONFIG_SYS_I2C_BASE##num, DEF_SPD, &std_cfg_table[DEF_SPD_ENUM]}
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static struct bcm_kona_i2c_dev g_i2c_devs[CONFIG_SYS_MAX_I2C_BUS] = {
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static struct bcm_kona_i2c_dev g_i2c_devs[CFG_SYS_MAX_I2C_BUS] = {
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#ifdef CONFIG_SYS_I2C_BASE0
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DEF_DEVICE(0),
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#endif
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@@ -374,45 +374,12 @@ static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
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static struct mv_i2c *base_glob;
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#ifdef CONFIG_I2C_MULTI_BUS
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static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
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static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
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static unsigned int current_bus;
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int i2c_set_bus_num(unsigned int bus)
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{
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if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
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printf("Bad bus: %d\n", bus);
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return -1;
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}
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base_glob = (struct mv_i2c *)i2c_regs[bus];
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current_bus = bus;
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if (!bus_initialized[current_bus]) {
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bus_initialized[current_bus] = 1;
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}
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return 0;
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}
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unsigned int i2c_get_bus_num(void)
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{
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return current_bus;
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}
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#endif
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/* API Functions */
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void i2c_init(int speed, int slaveaddr)
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{
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u32 val;
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#ifdef CONFIG_I2C_MULTI_BUS
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current_bus = 0;
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base_glob = (struct mv_i2c *)i2c_regs[current_bus];
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#else
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base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG;
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#endif
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if (speed > I2C_SPEED_STANDARD_RATE)
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val = ICR_FM;
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@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#endif /* CONFIG_DM_I2C */
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/*
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* On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
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* On SUNXI, we get CFG_SYS_TCLK from this include, so we want to
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* always have it.
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*/
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#if CONFIG_IS_ENABLED(DM_I2C) && defined(CONFIG_ARCH_SUNXI)
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@@ -197,13 +197,13 @@ inline uint calc_tick(uint speed)
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static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
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{
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switch (adap->hwadapnr) {
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#ifdef CONFIG_I2C_MVTWSI_BASE0
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#ifdef CFG_I2C_MVTWSI_BASE0
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case 0:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
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return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE0;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE1
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#ifdef CFG_I2C_MVTWSI_BASE1
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case 1:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
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return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE1;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE2
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case 2:
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@@ -427,9 +427,9 @@ static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
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static uint twsi_calc_freq(const int n, const int m)
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{
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#ifdef CONFIG_ARCH_SUNXI
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return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
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return CFG_SYS_TCLK / (10 * (m + 1) * (1 << n));
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#else
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return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
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return CFG_SYS_TCLK / (10 * (m + 1) * (2 << n));
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#endif
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}
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@@ -737,13 +737,13 @@ static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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10000);
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}
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#ifdef CONFIG_I2C_MVTWSI_BASE0
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#ifdef CFG_I2C_MVTWSI_BASE0
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U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
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twsi_i2c_read, twsi_i2c_write,
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twsi_i2c_set_bus_speed,
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CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE1
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#ifdef CFG_I2C_MVTWSI_BASE1
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U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
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twsi_i2c_read, twsi_i2c_write,
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twsi_i2c_set_bus_speed,
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@@ -39,8 +39,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#define VF610_I2C_REGSHIFT 0
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#define I2C_EARLY_INIT_INDEX 0
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#ifdef CONFIG_SYS_I2C_IFDR_DIV
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#define I2C_IFDR_DIV_CONSERVATIVE CONFIG_SYS_I2C_IFDR_DIV
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#ifdef CFG_SYS_I2C_IFDR_DIV
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#define I2C_IFDR_DIV_CONSERVATIVE CFG_SYS_I2C_IFDR_DIV
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#else
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#define I2C_IFDR_DIV_CONSERVATIVE 0x7e
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#endif
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