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clk: rockchip: Add clocks used by mipi-dsi on rk3399

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Signed-off-by: Ondrej Jirman <megi@xff.cz>
This commit is contained in:
Ondrej Jirman
2023-05-22 00:19:02 +02:00
parent eb8f8b3412
commit ce6e04b98b
1 changed files with 12 additions and 0 deletions
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12
drivers/clk/rockchip/clk_rk3399.c
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@@ -1214,6 +1214,12 @@ static int rk3399_clk_enable(struct clk *clk)
case SCLK_PCIEPHY_REF: case SCLK_PCIEPHY_REF:
rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
break; break;
case SCLK_DPHY_TX0_CFG:
rk_clrreg(&priv->cru->clkgate_con[21], BIT(1));
break;
case PCLK_VIO_GRF:
rk_clrreg(&priv->cru->clkgate_con[29], BIT(12));
break;
default: default:
debug("%s: unsupported clk %ld\n", __func__, clk->id); debug("%s: unsupported clk %ld\n", __func__, clk->id);
return -ENOENT; return -ENOENT;
@@ -1308,6 +1314,12 @@ static int rk3399_clk_disable(struct clk *clk)
case SCLK_PCIEPHY_REF: case SCLK_PCIEPHY_REF:
rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
break; break;
case SCLK_DPHY_TX0_CFG:
rk_setreg(&priv->cru->clkgate_con[21], BIT(1));
break;
case PCLK_VIO_GRF:
rk_setreg(&priv->cru->clkgate_con[29], BIT(12));
break;
default: default:
debug("%s: unsupported clk %ld\n", __func__, clk->id); debug("%s: unsupported clk %ld\n", __func__, clk->id);
return -ENOENT; return -ENOENT;