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powerpc: T4080: Drop configuration for T4080

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There is no T4080 target. Drop related macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun
2016-11-21 13:41:30 -08:00
parent 26bc57da0a
commit cdb72c5212
7 changed files with 7 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/powerpc/cpu/mpc85xx/Makefile
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@@ -46,7 +46,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020_ids.o
obj-$(CONFIG_ARCH_P5040) += p5040_ids.o
obj-$(CONFIG_ARCH_T4240) += t4240_ids.o
obj-$(CONFIG_ARCH_T4160) += t4240_ids.o
obj-$(CONFIG_PPC_T4080) += t4240_ids.o
obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
obj-$(CONFIG_ARCH_T1040) += t1040_ids.o
@@ -88,7 +87,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020_serdes.o
obj-$(CONFIG_ARCH_P5040) += p5040_serdes.o
obj-$(CONFIG_ARCH_T4240) += t4240_serdes.o
obj-$(CONFIG_ARCH_T4160) += t4240_serdes.o
obj-$(CONFIG_PPC_T4080) += t4240_serdes.o
obj-$(CONFIG_ARCH_B4420) += b4860_serdes.o
obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o

5
arch/powerpc/cpu/mpc85xx/fdt.c
View File

@@ -512,7 +512,7 @@ static void fdt_fixup_usb(void *fdt)
#endif
#if defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T4240) || \
defined(CONFIG_ARCH_T4160) || defined(CONFIG_PPC_T4080)
defined(CONFIG_ARCH_T4160)
void fdt_fixup_dma3(void *blob)
{
/* the 3rd DMA is not functional if SRIO2 is chosen */
@@ -529,8 +529,7 @@ void fdt_fixup_dma3(void *blob)
case 0x29:
case 0x2d:
case 0x2e:
#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
defined(CONFIG_PPC_T4080)
#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;

3
arch/powerpc/cpu/mpc85xx/speed.c
View File

@@ -131,8 +131,7 @@ void get_sys_info(sys_info_t *sys_info)
* T2080 rev 1.1 and later also use half mem_pll comparing with rev 1.0
*/
#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
defined(CONFIG_PPC_T4080) || defined(CONFIG_ARCH_T2080) || \
defined(CONFIG_ARCH_T2081)
defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
svr = get_svr();
switch (SVR_SOC_VER(svr)) {
case SVR_T4240:

2
arch/powerpc/cpu/mpc85xx/t4240_serdes.c
View File

@@ -263,7 +263,7 @@ static const struct serdes_config serdes4_cfg_tbl[] = {
{18, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, AURORA, AURORA}},
{}
};
#elif defined(CONFIG_ARCH_T4160) || defined(CONFIG_PPC_T4080)
#elif defined(CONFIG_ARCH_T4160)
static const struct serdes_config serdes1_cfg_tbl[] = {
/* SerDes 1 */
{1, {NONE, NONE, NONE, NONE,

6
arch/powerpc/include/asm/config_mpc85xx.h
View File

@@ -545,8 +545,7 @@
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
#define CONFIG_ESDHC_HC_BLK_ADDR
#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
defined(CONFIG_PPC_T4080)
#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
#define CONFIG_E6500
#define CONFIG_SYS_PPC64 /* 64-bit core */
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
@@ -571,9 +570,6 @@
#if defined(CONFIG_ARCH_T4160)
#define CONFIG_MAX_CPUS 8
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
#elif defined(CONFIG_PPC_T4080)
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1 }
#endif
#endif
#define CONFIG_SYS_FSL_NUM_CC_PLLS 5

6
arch/powerpc/include/asm/immap_85xx.h
View File

@@ -1759,8 +1759,7 @@ typedef struct ccsr_gur {
/* use reserved bits 18~23 as scratch space to host DDR PLL ratio */
#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_RESV_SHIFT 8
#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK 0x3f
#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
defined(CONFIG_PPC_T4080)
#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfc000000
#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 26
#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00fe0000
@@ -1875,8 +1874,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII 0x00100000
#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE 0x00180000
#endif
#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
defined(CONFIG_PPC_T4080)
#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
#define FSL_CORENET_RCWSR13_EC1 0x60000000 /* bits 417..418 */
#define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII 0x00000000
#define FSL_CORENET_RCWSR13_EC1_FM2_GPIO 0x40000000

1
drivers/net/fm/Makefile
View File

@@ -34,7 +34,6 @@ obj-$(CONFIG_ARCH_T2080) += t2080.o
obj-$(CONFIG_ARCH_T2081) += t2080.o
obj-$(CONFIG_ARCH_T4240) += t4240.o
obj-$(CONFIG_ARCH_T4160) += t4240.o
obj-$(CONFIG_PPC_T4080) += t4240.o
obj-$(CONFIG_ARCH_B4420) += b4860.o
obj-$(CONFIG_ARCH_B4860) += b4860.o
obj-$(CONFIG_LS1043A) += ls1043.o