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common: Drop linux/bitops.h from common header

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Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2020-05-10 11:40:13 -06:00
committed by Tom Rini
parent f09f1ecbe7
commit cd93d625fd
749 changed files with 940 additions and 6 deletions
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3
arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
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@@ -8,6 +8,8 @@
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
/* Clock manager group */
#define CLKMGR_A10_CTRL 0x00
#define CLKMGR_A10_INTR 0x04
@@ -64,6 +66,7 @@
int cm_basic_init(const void *blob);
#endif
#include <linux/bitops.h>
unsigned int cm_get_l4_sp_clk_hz(void);
unsigned long cm_get_mpu_clk_hz(void);

3
arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
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@@ -8,6 +8,8 @@
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
struct cm_config {
/* main group */
u32 main_vco_base;
@@ -109,6 +111,7 @@ int cm_basic_init(const struct cm_config * const cfg);
const struct cm_config * const cm_get_default_config(void);
#endif /* __ASSEMBLY__ */
#include <linux/bitops.h>
#define LOCKED_MASK \
(CLKMGR_INTER_SDRPLLLOCKED_MASK | \
CLKMGR_INTER_PERPLLLOCKED_MASK | \

1
arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
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@@ -8,6 +8,7 @@
#define _CLOCK_MANAGER_S10_
#include <asm/arch/clock_manager_soc64.h>
#include <linux/bitops.h>
/* Clock speed accessors */
unsigned long cm_get_mpu_clk_hz(void);

2
arch/arm/mach-socfpga/include/mach/firewall.h
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@@ -7,6 +7,8 @@
#ifndef _FIREWALL_H_
#define _FIREWALL_H_
#include <linux/bitops.h>
struct socfpga_firwall_l4_per {
u32 nand; /* 0x00 */
u32 nand_data;

1
arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
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@@ -7,6 +7,7 @@
#include <asm/cache.h>
#include <altera.h>
#include <image.h>
#include <linux/bitops.h>
#ifndef _FPGA_MANAGER_ARRIA10_H_
#define _FPGA_MANAGER_ARRIA10_H_

1
arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
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@@ -7,6 +7,7 @@
#ifndef _FPGA_MANAGER_GEN5_H_
#define _FPGA_MANAGER_GEN5_H_
#include <linux/bitops.h>
#define FPGAMGRREGS_STAT_MODE_MASK 0x7
#define FPGAMGRREGS_STAT_MSEL_MASK 0xf8
#define FPGAMGRREGS_STAT_MSEL_LSB 3

1
arch/arm/mach-socfpga/include/mach/mailbox_s10.h
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@@ -8,6 +8,7 @@
#define _MAILBOX_S10_H_
/* user define Uboot ID */
#include <linux/bitops.h>
#define MBOX_CLIENT_ID_UBOOT 0xB
#define MBOX_ID_UBOOT 0x1

1
arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
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@@ -7,6 +7,7 @@
#define _RESET_MANAGER_ARRIA10_H_
#include <dt-bindings/reset/altr,rst-mgr-a10.h>
#include <linux/bitops.h>
void socfpga_watchdog_disable(void);
void socfpga_reset_deassert_noc_ddr_scheduler(void);

1
arch/arm/mach-socfpga/include/mach/sdram_arria10.h
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@@ -7,6 +7,7 @@
#define _SOCFPGA_SDRAM_ARRIA10_H_
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
int ddr_calibration_sequence(void);
struct socfpga_ecc_hmc {

1
arch/arm/mach-socfpga/include/mach/system_manager.h
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@@ -94,5 +94,6 @@ phys_addr_t socfpga_get_sysmgr_addr(void);
#define SYSMGR_GET_BOOTINFO_BSEL(bsel) \
(((bsel) >> SYSMGR_BOOTINFO_BSEL_SHIFT) & 7)
#include <linux/bitops.h>
#endif
#endif /* _SYSTEM_MANAGER_H_ */

1
arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
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@@ -6,6 +6,7 @@
#ifndef _SYSTEM_MANAGER_SOC64_H_
#define _SYSTEM_MANAGER_SOC64_H_
#include <linux/bitops.h>
void sysmgr_pinmux_init(void);
void populate_sysmgr_fpgaintf_module(void);
void populate_sysmgr_pinmux(void);