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spi: mxs: Drop nondm code

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Deadline for DM migration already passed by months
and no response on full dm conversation hence removed
the nondm code.

Note: Look like there is no user for nondm code
for this driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Jagan Teki
2020-05-25 23:24:23 +05:30
parent be79009f3b
commit c9a9823f26
2 changed files with 6 additions and 129 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/spi/Kconfig
View File

@@ -207,6 +207,12 @@ config MVEBU_A3700_SPI
used to access the SPI NOR flash on platforms embedding this used to access the SPI NOR flash on platforms embedding this
Marvell IP core. Marvell IP core.
config MXS_SPI
bool "MXS SPI Driver"
help
Enable the MXS SPI controller driver. This driver can be used
on the i.MX23 and i.MX28 SoCs.
config NXP_FSPI config NXP_FSPI
bool "NXP FlexSPI driver" bool "NXP FlexSPI driver"
depends on SPI_MEM depends on SPI_MEM
@@ -424,12 +430,6 @@ config MXC_SPI
Enable the MXC SPI controller driver. This driver can be used Enable the MXC SPI controller driver. This driver can be used
on various i.MX SoCs such as i.MX31/35/51/6/7. on various i.MX SoCs such as i.MX31/35/51/6/7.
config MXS_SPI
bool "MXS SPI Driver"
help
Enable the MXS SPI controller driver. This driver can be used
on the i.MX23 and i.MX28 SoCs.
config OMAP3_SPI config OMAP3_SPI
bool "McSPI driver for OMAP" bool "McSPI driver for OMAP"
help help

123
drivers/spi/mxs_spi.c
View File

@@ -46,19 +46,6 @@ static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs)
writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set); writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
} }
#if !CONFIG_IS_ENABLED(DM_SPI)
struct mxs_spi_slave {
struct spi_slave slave;
uint32_t max_khz;
uint32_t mode;
struct mxs_ssp_regs *regs;
};
static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
{
return container_of(slave, struct mxs_spi_slave, slave);
}
#else
#include <dm.h> #include <dm.h>
#include <errno.h> #include <errno.h>
#include <dt-structs.h> #include <dt-structs.h>
@@ -87,20 +74,12 @@ struct mxs_spi_priv {
unsigned int clk_id; unsigned int clk_id;
unsigned int mode; unsigned int mode;
}; };
#endif
#if !CONFIG_IS_ENABLED(DM_SPI)
static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
char *data, int length, int write, unsigned long flags)
{
struct mxs_ssp_regs *ssp_regs = slave->regs;
#else
static int mxs_spi_xfer_pio(struct mxs_spi_priv *priv, static int mxs_spi_xfer_pio(struct mxs_spi_priv *priv,
char *data, int length, int write, char *data, int length, int write,
unsigned long flags) unsigned long flags)
{ {
struct mxs_ssp_regs *ssp_regs = priv->regs; struct mxs_ssp_regs *ssp_regs = priv->regs;
#endif
if (flags & SPI_XFER_BEGIN) if (flags & SPI_XFER_BEGIN)
mxs_spi_start_xfer(ssp_regs); mxs_spi_start_xfer(ssp_regs);
@@ -156,17 +135,10 @@ static int mxs_spi_xfer_pio(struct mxs_spi_priv *priv,
return 0; return 0;
} }
#if !CONFIG_IS_ENABLED(DM_SPI)
static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
char *data, int length, int write, unsigned long flags)
{
struct mxs_ssp_regs *ssp_regs = slave->regs;
#else
static int mxs_spi_xfer_dma(struct mxs_spi_priv *priv, static int mxs_spi_xfer_dma(struct mxs_spi_priv *priv,
char *data, int length, int write, char *data, int length, int write,
unsigned long flags) unsigned long flags)
{ struct mxs_ssp_regs *ssp_regs = priv->regs; { struct mxs_ssp_regs *ssp_regs = priv->regs;
#endif
const int xfer_max_sz = 0xff00; const int xfer_max_sz = 0xff00;
const int desc_count = DIV_ROUND_UP(length, xfer_max_sz) + 1; const int desc_count = DIV_ROUND_UP(length, xfer_max_sz) + 1;
struct mxs_dma_desc *dp; struct mxs_dma_desc *dp;
@@ -207,11 +179,7 @@ static int mxs_spi_xfer_dma(struct mxs_spi_priv *priv,
/* Invalidate the area, so no writeback into the RAM races with DMA */ /* Invalidate the area, so no writeback into the RAM races with DMA */
invalidate_dcache_range(dstart, dstart + cache_data_count); invalidate_dcache_range(dstart, dstart + cache_data_count);
#if !CONFIG_IS_ENABLED(DM_SPI)
dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + slave->slave.bus;
#else
dmach = priv->dma_channel; dmach = priv->dma_channel;
#endif
dp = desc; dp = desc;
while (length) { while (length) {
@@ -288,20 +256,12 @@ static int mxs_spi_xfer_dma(struct mxs_spi_priv *priv,
return ret; return ret;
} }
#if !CONFIG_IS_ENABLED(DM_SPI)
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)
{
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
struct mxs_ssp_regs *ssp_regs = mxs_slave->regs;
#else
int mxs_spi_xfer(struct udevice *dev, unsigned int bitlen, int mxs_spi_xfer(struct udevice *dev, unsigned int bitlen,
const void *dout, void *din, unsigned long flags) const void *dout, void *din, unsigned long flags)
{ {
struct udevice *bus = dev_get_parent(dev); struct udevice *bus = dev_get_parent(dev);
struct mxs_spi_priv *priv = dev_get_priv(bus); struct mxs_spi_priv *priv = dev_get_priv(bus);
struct mxs_ssp_regs *ssp_regs = priv->regs; struct mxs_ssp_regs *ssp_regs = priv->regs;
#endif
int len = bitlen / 8; int len = bitlen / 8;
char dummy; char dummy;
int write = 0; int write = 0;
@@ -345,95 +305,13 @@ int mxs_spi_xfer(struct udevice *dev, unsigned int bitlen,
if (!dma || (len < MXSSSP_SMALL_TRANSFER)) { if (!dma || (len < MXSSSP_SMALL_TRANSFER)) {
writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr);
#if !CONFIG_IS_ENABLED(DM_SPI)
return mxs_spi_xfer_pio(mxs_slave, data, len, write, flags);
#else
return mxs_spi_xfer_pio(priv, data, len, write, flags); return mxs_spi_xfer_pio(priv, data, len, write, flags);
#endif
} else { } else {
writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set);
#if !CONFIG_IS_ENABLED(DM_SPI)
return mxs_spi_xfer_dma(mxs_slave, data, len, write, flags);
#else
return mxs_spi_xfer_dma(priv, data, len, write, flags); return mxs_spi_xfer_dma(priv, data, len, write, flags);
#endif
} }
} }
#if !CONFIG_IS_ENABLED(DM_SPI)
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
/* MXS SPI: 4 ports and 3 chip selects maximum */
if (!mxs_ssp_bus_id_valid(bus) || cs > 2)
return 0;
else
return 1;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct mxs_spi_slave *mxs_slave;
if (!spi_cs_is_valid(bus, cs)) {
printf("mxs_spi: invalid bus %d / chip select %d\n", bus, cs);
return NULL;
}
mxs_slave = spi_alloc_slave(struct mxs_spi_slave, bus, cs);
if (!mxs_slave)
return NULL;
if (mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + bus))
goto err_init;
mxs_slave->max_khz = max_hz / 1000;
mxs_slave->mode = mode;
mxs_slave->regs = mxs_ssp_regs_by_bus(bus);
return &mxs_slave->slave;
err_init:
free(mxs_slave);
return NULL;
}
void spi_free_slave(struct spi_slave *slave)
{
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
free(mxs_slave);
}
int spi_claim_bus(struct spi_slave *slave)
{
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
struct mxs_ssp_regs *ssp_regs = mxs_slave->regs;
u32 reg = 0;
mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
writel((slave->cs << MXS_SSP_CHIPSELECT_SHIFT) |
SSP_CTRL0_BUS_WIDTH_ONE_BIT,
&ssp_regs->hw_ssp_ctrl0);
reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
writel(reg, &ssp_regs->hw_ssp_ctrl1);
writel(0, &ssp_regs->hw_ssp_cmd0);
mxs_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
}
#else /* CONFIG_DM_SPI */
/* Base numbers of i.MX2[38] clk for ssp0 IP block */ /* Base numbers of i.MX2[38] clk for ssp0 IP block */
#define MXS_SSP_IMX23_CLKID_SSP0 33 #define MXS_SSP_IMX23_CLKID_SSP0 33
#define MXS_SSP_IMX28_CLKID_SSP0 46 #define MXS_SSP_IMX28_CLKID_SSP0 46
@@ -625,4 +503,3 @@ U_BOOT_DRIVER(mxs_spi) = {
.priv_auto_alloc_size = sizeof(struct mxs_spi_priv), .priv_auto_alloc_size = sizeof(struct mxs_spi_priv),
.probe = mxs_spi_probe, .probe = mxs_spi_probe,
}; };
#endif