From c842a731f7e1640b7a0f12c4af9bcc6022583937 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Mon, 22 May 2023 00:19:02 +0200 Subject: [PATCH] clk: rockchip: Add clocks used by mipi-dsi on rk3399 Signed-off-by: Ondrej Jirman --- drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 89da5729baa..dff70d6e1c5 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1215,6 +1215,12 @@ static int rk3399_clk_enable(struct clk *clk) case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; + case SCLK_DPHY_TX0_CFG: + rk_clrreg(&priv->cru->clkgate_con[21], BIT(1)); + break; + case PCLK_VIO_GRF: + rk_clrreg(&priv->cru->clkgate_con[29], BIT(12)); + break; default: debug("%s: unsupported clk %ld\n", __func__, clk->id); return -ENOENT; @@ -1309,6 +1315,12 @@ static int rk3399_clk_disable(struct clk *clk) case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; + case SCLK_DPHY_TX0_CFG: + rk_setreg(&priv->cru->clkgate_con[21], BIT(1)); + break; + case PCLK_VIO_GRF: + rk_setreg(&priv->cru->clkgate_con[29], BIT(12)); + break; default: debug("%s: unsupported clk %ld\n", __func__, clk->id); return -ENOENT;