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stm32f7: sdram: correct sdram configuration as per micron sdram

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Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.

Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
This commit is contained in:
Vikas Manocha
2017-04-10 15:03:03 -07:00
committed by Tom Rini
parent a241c241cf
commit bfea69ad27
4 changed files with 33 additions and 51 deletions
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15
include/dt-bindings/memory/stm32-sdram.h
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@@ -18,17 +18,20 @@
#define CAS_1 0x1
#define CAS_2 0x2
#define CAS_3 0x3
#define SDCLK_2 0x2
#define RD_BURST_EN 0x1
#define RD_BURST_DIS 0x0
#define RD_PIPE_DL_0 0x0
#define RD_PIPE_DL_1 0x1
#define RD_PIPE_DL_2 0x2
#define TMRD_1 0x1
#define TXSR_60 60
#define TRAS_42 42
#define TRC_60 60
#define TRP_18 18
#define TRCD_18 18
/* Timing = value +1 cycles */
#define TMRD_2 (2 - 1)
#define TXSR_6 (6 - 1)
#define TRAS_4 (4 - 1)
#define TRC_6 (6 - 1)
#define TWR_2 (2 - 1)
#define TRP_2 (2 - 1)
#define TRCD_2 (2 - 1)
#endif