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net: tsec: Fix offset of MDIO registers for DM_ETH

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By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).

That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.

So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Vladimir Oltean
2019-07-19 00:29:54 +03:00
committed by Joe Hershberger
parent 29db3107a5
commit bca686a4f9
2 changed files with 10 additions and 7 deletions
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4
include/tsec.h
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@@ -17,6 +17,8 @@
#include <config.h>
#include <phy.h>
#define TSEC_MDIO_REGS_OFFSET 0x520
#ifndef CONFIG_DM_ETH
#ifdef CONFIG_ARCH_LS1021A
@@ -27,7 +29,7 @@
#define TSEC_MDIO_OFFSET 0x01000
#endif
#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520)
#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + TSEC_MDIO_REGS_OFFSET)
#define TSEC_GET_REGS(num, offset) \
(struct tsec __iomem *)\