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engicam: Move uart mux init to SPL

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Since, u-boot handle fdt through uart so move the UART code
to SPL instead make it to global area.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Jagan Teki
2017-05-07 02:43:06 +05:30
committed by Stefano Babic
parent bc1fe9006d
commit b805b17466
4 changed files with 40 additions and 68 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
board/engicam/geam6ul/geam6ul.c
View File

@@ -22,22 +22,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
int board_early_init_f(void)
{
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
return 0;
}
#ifdef CONFIG_NAND_MXS #ifdef CONFIG_NAND_MXS
#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -173,6 +157,15 @@ int dram_init(void)
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-ddr.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
/* MMC board initialization is needed till adding DM support in SPL */ /* MMC board initialization is needed till adding DM support in SPL */
#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
#include <mmc.h> #include <mmc.h>
@@ -341,7 +334,7 @@ void board_init_f(ulong dummy)
ccgr_init(); ccgr_init();
/* iomux and setup of i2c */ /* iomux and setup of i2c */
board_early_init_f(); imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
/* setup GP timer */ /* setup GP timer */
timer_init(); timer_init();

27
board/engicam/icorem6/icorem6.c
View File

@@ -23,15 +23,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
#ifdef CONFIG_NAND_MXS #ifdef CONFIG_NAND_MXS
#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -199,13 +190,6 @@ static void setup_display(void)
} }
#endif /* CONFIG_VIDEO_IPUV3 */ #endif /* CONFIG_VIDEO_IPUV3 */
int board_early_init_f(void)
{
SETUP_IOMUX_PADS(uart4_pads);
return 0;
}
#ifdef CONFIG_ENV_IS_IN_MMC #ifdef CONFIG_ENV_IS_IN_MMC
static void mmc_late_init(void) static void mmc_late_init(void)
{ {
@@ -281,6 +265,15 @@ int dram_init(void)
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-ddr.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
/* MMC board initialization is needed till adding DM support in SPL */ /* MMC board initialization is needed till adding DM support in SPL */
#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
#include <mmc.h> #include <mmc.h>
@@ -617,7 +610,7 @@ void board_init_f(ulong dummy)
gpr_init(); gpr_init();
/* iomux */ /* iomux */
board_early_init_f(); SETUP_IOMUX_PADS(uart4_pads);
/* setup GP timer */ /* setup GP timer */
timer_init(); timer_init();

27
board/engicam/icorem6_rqs/icorem6_rqs.c
View File

@@ -22,22 +22,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
int board_early_init_f(void)
{
SETUP_IOMUX_PADS(uart4_pads);
return 0;
}
int board_init(void) int board_init(void)
{ {
/* Address of boot parameters */ /* Address of boot parameters */
@@ -110,6 +94,15 @@ int dram_init(void)
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-ddr.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
/* MMC board initialization is needed till adding DM support in SPL */ /* MMC board initialization is needed till adding DM support in SPL */
#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
#include <mmc.h> #include <mmc.h>
@@ -488,7 +481,7 @@ void board_init_f(ulong dummy)
gpr_init(); gpr_init();
/* iomux */ /* iomux */
board_early_init_f(); SETUP_IOMUX_PADS(uart4_pads);
/* setup GP timer */ /* setup GP timer */
timer_init(); timer_init();

27
board/engicam/isiotmx6ul/isiotmx6ul.c
View File

@@ -22,22 +22,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
int board_early_init_f(void)
{
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
return 0;
}
#ifdef CONFIG_NAND_MXS #ifdef CONFIG_NAND_MXS
#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -185,6 +169,15 @@ int dram_init(void)
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-ddr.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
/* MMC board initialization is needed till adding DM support in SPL */ /* MMC board initialization is needed till adding DM support in SPL */
#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
#include <mmc.h> #include <mmc.h>
@@ -402,7 +395,7 @@ void board_init_f(ulong dummy)
ccgr_init(); ccgr_init();
/* iomux and setup of i2c */ /* iomux and setup of i2c */
board_early_init_f(); imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
/* setup GP timer */ /* setup GP timer */
timer_init(); timer_init();