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board: amlogic: add support for S400 board
The S400 board is the Amlogic AXG SoC reference board including : - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz - 1GB DDR4 SDRAM - 10/100 Ethernet - 2 x USB 2.0 Host - eMMC - Infrared receiver - SDIO WiFi Module - MIPI DSI Connector - Audio HAT Connector - PCI-E M.2 Connectors Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit is contained in:
@@ -63,6 +63,7 @@ config SYS_BOARD
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default "odroid-c2" if MESON_GXBB
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default "odroid-c2" if MESON_GXBB
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default "p212" if MESON_GXL
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default "p212" if MESON_GXL
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default "q200" if MESON_GXM
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default "q200" if MESON_GXM
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default "s400" if MESON_AXG
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default ""
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default ""
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help
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help
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This option contains information about board name.
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This option contains information about board name.
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6
board/amlogic/s400/MAINTAINERS
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6
board/amlogic/s400/MAINTAINERS
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S400
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M: Neil Armstrong <narmstrong@baylibre.com>
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S: Maintained
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F: board/amlogic/s400/
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F: include/configs/s400.h
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F: configs/s400_defconfig
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6
board/amlogic/s400/Makefile
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6
board/amlogic/s400/Makefile
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# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2016 BayLibre, SAS
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# Author: Neil Armstrong <narmstrong@baylibre.com>
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obj-y := s400.o
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110
board/amlogic/s400/README
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110
board/amlogic/s400/README
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U-Boot for Amlogic S400
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=======================
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S400 is a reference board manufactured by Amlogic with the following
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specifications:
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- Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz
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- 1GB DDR4 SDRAM
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- 10/100 Ethernet
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- 2 x USB 2.0 Host
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- eMMC
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- Infrared receiver
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- SDIO WiFi Module
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- MIPI DSI Connector
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- Audio HAT Connector
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- PCI-E M.2 Connectors
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Schematics are available from Amlogic on demand.
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Currently the u-boot port supports the following devices:
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- serial
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- eMMC
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- Ethernet
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- I2C
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- Regulators
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- Reset controller
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- Clock controller
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- USB Host
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- ADC
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u-boot compilation
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==================
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> export ARCH=arm
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> export CROSS_COMPILE=aarch64-none-elf-
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> make s400_defconfig
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> make
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Image creation
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==============
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Amlogic doesn't provide sources for the firmware and for tools needed
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to create the bootloader image, so it is necessary to obtain them from
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the git tree published by the board vendor:
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> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
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> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
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> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
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> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
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> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
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> git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
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> cd amlogic-u-boot
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> make axg_s400_v1_defconfig
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> make
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> export FIPDIR=$PWD/fip
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Go back to mainline U-boot source tree then :
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> mkdir fip
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> cp $FIPDIR/axg/bl2.bin fip/
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> cp $FIPDIR/axg/acs.bin fip/
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> cp $FIPDIR/axg/bl21.bin fip/
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> cp $FIPDIR/axg/bl30.bin fip/
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> cp $FIPDIR/axg/bl301.bin fip/
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> cp $FIPDIR/axg/bl31.img fip/
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> cp u-boot.bin fip/bl33.bin
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> $FIPDIR/blx_fix.sh \
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fip/bl30.bin \
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fip/zero_tmp \
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fip/bl30_zero.bin \
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fip/bl301.bin \
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fip/bl301_zero.bin \
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fip/bl30_new.bin \
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bl30
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> $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
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> $FIPDIR/blx_fix.sh \
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fip/bl2_acs.bin \
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fip/zero_tmp \
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fip/bl2_zero.bin \
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fip/bl21.bin \
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fip/bl21_zero.bin \
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fip/bl2_new.bin \
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bl2
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> $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
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--output fip/bl30_new.bin.enc \
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--level v3 --type bl30
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> $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl31.img \
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--output fip/bl31.img.enc \
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--level v3 --type bl31
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> $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
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--output fip/bl33.bin.enc \
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--level v3 --type bl33
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> $FIPDIR/axg/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
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--output fip/bl2.n.bin.sig
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> $FIPDIR/axg/aml_encrypt_axg --bootmk \
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--output fip/u-boot.bin \
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--bl2 fip/bl2.n.bin.sig \
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--bl30 fip/bl30_new.bin.enc \
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--bl31 fip/bl31.img.enc \
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--bl33 fip/bl33.bin.enc --level v3
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and then write the image to SD with:
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> DEV=/dev/your_sd_device
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> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
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> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
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33
board/amlogic/s400/s400.c
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33
board/amlogic/s400/s400.c
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@@ -0,0 +1,33 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <environment.h>
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#include <asm/io.h>
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#include <asm/arch/axg.h>
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#include <asm/arch/sm.h>
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#include <asm/arch/eth.h>
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#include <asm/arch/mem.h>
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int board_init(void)
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{
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return 0;
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}
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int misc_init_r(void)
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{
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meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
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return 0;
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}
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int ft_board_setup(void *blob, bd_t *bd)
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{
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meson_init_reserved_memory(blob);
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return 0;
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}
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38
configs/s400_defconfig
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38
configs/s400_defconfig
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@@ -0,0 +1,38 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MESON=y
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CONFIG_SYS_TEXT_BASE=0x01000000
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CONFIG_MESON_AXG=y
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CONFIG_DEBUG_UART_BASE=0xff803000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_IDENT_STRING=" s400"
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CONFIG_DEBUG_UART=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_MISC_INIT_R=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_IMI is not set
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_REGULATOR=y
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400"
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_MESON_AXG=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_RESET=y
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CONFIG_DEBUG_UART_MESON=y
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_MESON_SERIAL=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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