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arm: sunxi: Fix clock_get_pll6() calculation

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Off by on error. N is stored in register as N-1.

Signed-off-by: Ondrej Jirman <megous@megous.com>
This commit is contained in:
Ondrej Jirman
2019-09-12 01:21:27 +02:00
parent 24ef1ec9c7
commit b4a41c07c2
1 changed files with 4 additions and 4 deletions
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8
arch/arm/mach-sunxi/clock_sun50i_h6.c
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@@ -84,11 +84,11 @@ unsigned int clock_get_pll6(void)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE; (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
uint32_t rval = readl(&ccm->pll6_cfg); uint32_t rval = readl(&ccm->pll6_cfg);
int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT); unsigned int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT);
int div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> unsigned int div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >>
CCM_PLL6_CTRL_DIV1_SHIFT) + 1; CCM_PLL6_CTRL_DIV1_SHIFT) + 1;
int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> unsigned int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >>
CCM_PLL6_CTRL_DIV2_SHIFT) + 1; CCM_PLL6_CTRL_DIV2_SHIFT) + 1;
/* The register defines PLL6-4X, not plain PLL6 */ /* The register defines PLL6-4X, not plain PLL6 */
return 24000000 / 4 * n / div1 / div2; return 24000000 / 4 * (n + 1) / div1 / div2;
} }