From 150a878bd781d075aaea1736c5081d5c990efbad Mon Sep 17 00:00:00 2001 From: Andreas Dannenberg Date: Thu, 8 Aug 2019 12:54:49 -0500 Subject: [PATCH 01/14] README: Clarify use of BSS during SPL board_init_f() The earlier commit.... commit a5a5d997b41a ("spl: Allow performing BSS init early before board_init_f()") ...introduced the ability to use BSS from SPL's board_init_f() as it may be required in certain exceptional use cases so go ahead and update the README to reflect this change. Note that as highlighted with the changes the use of the associated CONFIG option is generally not recommended. Signed-off-by: Andreas Dannenberg Reviewed-by: Simon Goldschmidt --- README | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/README b/README index 2d91619a94..1389e8ff12 100644 --- a/README +++ b/README @@ -267,6 +267,13 @@ board_init_f(): - preloader_console_init() can be called here in extremis - should set up SDRAM, and anything needed to make the UART work - these is no need to clear BSS, it will be done by crt0.S + - for specific scenarios on certain architectures an early BSS *can* + be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing + of BSS prior to entering board_init_f()) but doing so is discouraged. + Instead it is strongly recommended to architect any code changes + or additions such to not depend on the availability of BSS during + board_init_f() as indicated in other sections of this README to + maintain compatibility and consistency across the entire code base. - must return normally from this function (don't call board_init_r() directly) From 7dd83edb47d3ec0a54a85434d5182ac3ea20964d Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 10 Aug 2019 13:17:21 +0200 Subject: [PATCH 02/14] mailmap: provide usage instruction Looking at the contents of file .mailmap it seems that some editors assumed that translation is done by entering multiple lines into the file and the last one replaces the others. This is not how it works. The translation occurs according to entries in single lines as described in the git-check-mailmap man-page. Add a description of the file format. Add an entry for Alexander Graf as his old email address is not valid anymore. Signed-off-by: Heinrich Schuchardt --- .mailmap | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/.mailmap b/.mailmap index 1bee048d13..dc72f24688 100644 --- a/.mailmap +++ b/.mailmap @@ -4,10 +4,18 @@ # and/or not always written the same way, making contributions from the # same person appearing not to be so or badly displayed. # +# This file is also used by scripts/get_maintainer.pl. +# # This file can be modified by hand or updated by the following command: # scripts/mailmapper > tmp; mv tmp .mailmap # +# Entries in this file take one of the following forms: +# Proper Name +# +# Proper Name +# Proper Name Commit Name +Alexander Graf Allen Martin Andreas Bießmann Andreas Bießmann From 848256bd94195cff9470ffb80d4ff23775b4807a Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Mon, 12 Aug 2019 20:26:58 +0200 Subject: [PATCH 03/14] mmc: mtk-sd: Add MT8183 SoC support Add support for the MT8183 in the MediaTek MMC driver. Signed-off-by: Fabien Parent --- drivers/mmc/mtk-sd.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 49085090c8..f555357af2 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -1393,9 +1393,19 @@ static const struct msdc_compatible mt8516_compat = { .stop_clk_fix = true, }; +static const struct msdc_compatible mt8183_compat = { + .clk_div_bits = 12, + .pad_tune0 = true, + .async_fifo = true, + .data_tune = true, + .busy_check = true, + .stop_clk_fix = true, +}; + static const struct udevice_id msdc_ids[] = { { .compatible = "mediatek,mt7623-mmc", .data = (ulong)&mt7623_compat }, { .compatible = "mediatek,mt8516-mmc", .data = (ulong)&mt8516_compat }, + { .compatible = "mediatek,mt8183-mmc", .data = (ulong)&mt8183_compat }, {} }; From 071f369dd2f83ac6d290b53ea7e530afd0a9e67d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 14 Aug 2019 22:07:29 +0200 Subject: [PATCH 04/14] jffs2: remove unused code files I failed to find where these two files are used and a few test compile runs with JFFS2 enabled succeeded also without these. --- fs/jffs2/jffs2_nand_1pass.c | 1036 --------------------------------- fs/jffs2/jffs2_nand_private.h | 133 ----- 2 files changed, 1169 deletions(-) delete mode 100644 fs/jffs2/jffs2_nand_1pass.c delete mode 100644 fs/jffs2/jffs2_nand_private.h diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c deleted file mode 100644 index b16005e604..0000000000 --- a/fs/jffs2/jffs2_nand_1pass.c +++ /dev/null @@ -1,1036 +0,0 @@ -#include - -#include -#include -#include - -#include -#include -#include - -#include "jffs2_nand_private.h" - -#define NODE_CHUNK 1024 /* size of memory allocation chunk in b_nodes */ - -/* Debugging switches */ -#undef DEBUG_DIRENTS /* print directory entry list after scan */ -#undef DEBUG_FRAGMENTS /* print fragment list after scan */ -#undef DEBUG /* enable debugging messages */ - -#ifdef DEBUG -# define DEBUGF(fmt,args...) printf(fmt ,##args) -#else -# define DEBUGF(fmt,args...) -#endif - -static struct mtd_info *mtd; - -/* Compression names */ -static char *compr_names[] = { - "NONE", - "ZERO", - "RTIME", - "RUBINMIPS", - "COPY", - "DYNRUBIN", - "ZLIB", -#if defined(CONFIG_JFFS2_LZO) - "LZO", -#endif -}; - -/* Spinning wheel */ -static char spinner[] = { '|', '/', '-', '\\' }; - -/* Memory management */ -struct mem_block { - unsigned index; - struct mem_block *next; - char nodes[0]; -}; - -static void -free_nodes(struct b_list *list) -{ - while (list->listMemBase != NULL) { - struct mem_block *next = list->listMemBase->next; - free(list->listMemBase); - list->listMemBase = next; - } -} - -static struct b_node * -add_node(struct b_list *list, int size) -{ - u32 index = 0; - struct mem_block *memBase; - struct b_node *b; - - memBase = list->listMemBase; - if (memBase != NULL) - index = memBase->index; - - if (memBase == NULL || index >= NODE_CHUNK) { - /* we need more space before we continue */ - memBase = mmalloc(sizeof(struct mem_block) + NODE_CHUNK * size); - if (memBase == NULL) { - putstr("add_node: malloc failed\n"); - return NULL; - } - memBase->next = list->listMemBase; - index = 0; - } - /* now we have room to add it. */ - b = (struct b_node *)&memBase->nodes[size * index]; - index ++; - - memBase->index = index; - list->listMemBase = memBase; - list->listCount++; - return b; -} - -static struct b_node * -insert_node(struct b_list *list, struct b_node *new) -{ -#ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS - struct b_node *b, *prev; - - if (list->listTail != NULL && list->listCompare(new, list->listTail)) - prev = list->listTail; - else if (list->listLast != NULL && list->listCompare(new, list->listLast)) - prev = list->listLast; - else - prev = NULL; - - for (b = (prev ? prev->next : list->listHead); - b != NULL && list->listCompare(new, b); - prev = b, b = b->next) { - list->listLoops++; - } - if (b != NULL) - list->listLast = prev; - - if (b != NULL) { - new->next = b; - if (prev != NULL) - prev->next = new; - else - list->listHead = new; - } else -#endif - { - new->next = (struct b_node *) NULL; - if (list->listTail != NULL) { - list->listTail->next = new; - list->listTail = new; - } else { - list->listTail = list->listHead = new; - } - } - - return new; -} - -static struct b_node * -insert_inode(struct b_list *list, struct jffs2_raw_inode *node, u32 offset) -{ - struct b_inode *new; - - if (!(new = (struct b_inode *)add_node(list, sizeof(struct b_inode)))) { - putstr("add_node failed!\r\n"); - return NULL; - } - new->offset = offset; - new->version = node->version; - new->ino = node->ino; - new->isize = node->isize; - new->csize = node->csize; - - return insert_node(list, (struct b_node *)new); -} - -static struct b_node * -insert_dirent(struct b_list *list, struct jffs2_raw_dirent *node, u32 offset) -{ - struct b_dirent *new; - - if (!(new = (struct b_dirent *)add_node(list, sizeof(struct b_dirent)))) { - putstr("add_node failed!\r\n"); - return NULL; - } - new->offset = offset; - new->version = node->version; - new->pino = node->pino; - new->ino = node->ino; - new->nhash = full_name_hash(node->name, node->nsize); - new->nsize = node->nsize; - new->type = node->type; - - return insert_node(list, (struct b_node *)new); -} - -#ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS -/* Sort data entries with the latest version last, so that if there - * is overlapping data the latest version will be used. - */ -static int compare_inodes(struct b_node *new, struct b_node *old) -{ - struct jffs2_raw_inode ojNew; - struct jffs2_raw_inode ojOld; - struct jffs2_raw_inode *jNew = - (struct jffs2_raw_inode *)get_fl_mem(new->offset, sizeof(ojNew), &ojNew); - struct jffs2_raw_inode *jOld = - (struct jffs2_raw_inode *)get_fl_mem(old->offset, sizeof(ojOld), &ojOld); - - return jNew->version > jOld->version; -} - -/* Sort directory entries so all entries in the same directory - * with the same name are grouped together, with the latest version - * last. This makes it easy to eliminate all but the latest version - * by marking the previous version dead by setting the inode to 0. - */ -static int compare_dirents(struct b_node *new, struct b_node *old) -{ - struct jffs2_raw_dirent ojNew; - struct jffs2_raw_dirent ojOld; - struct jffs2_raw_dirent *jNew = - (struct jffs2_raw_dirent *)get_fl_mem(new->offset, sizeof(ojNew), &ojNew); - struct jffs2_raw_dirent *jOld = - (struct jffs2_raw_dirent *)get_fl_mem(old->offset, sizeof(ojOld), &ojOld); - int cmp; - - /* ascending sort by pino */ - if (jNew->pino != jOld->pino) - return jNew->pino > jOld->pino; - - /* pino is the same, so use ascending sort by nsize, so - * we don't do strncmp unless we really must. - */ - if (jNew->nsize != jOld->nsize) - return jNew->nsize > jOld->nsize; - - /* length is also the same, so use ascending sort by name - */ - cmp = strncmp(jNew->name, jOld->name, jNew->nsize); - if (cmp != 0) - return cmp > 0; - - /* we have duplicate names in this directory, so use ascending - * sort by version - */ - if (jNew->version > jOld->version) { - /* since jNew is newer, we know jOld is not valid, so - * mark it with inode 0 and it will not be used - */ - jOld->ino = 0; - return 1; - } - - return 0; -} -#endif - -static u32 -jffs_init_1pass_list(struct part_info *part) -{ - struct b_lists *pL; - - if (part->jffs2_priv != NULL) { - pL = (struct b_lists *)part->jffs2_priv; - free_nodes(&pL->frag); - free_nodes(&pL->dir); - free(pL); - } - if (NULL != (part->jffs2_priv = malloc(sizeof(struct b_lists)))) { - pL = (struct b_lists *)part->jffs2_priv; - - memset(pL, 0, sizeof(*pL)); -#ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS - pL->dir.listCompare = compare_dirents; - pL->frag.listCompare = compare_inodes; -#endif - } - return 0; -} - -/* find the inode from the slashless name given a parent */ -static long -jffs2_1pass_read_inode(struct b_lists *pL, u32 ino, char *dest, - struct stat *stat) -{ - struct b_inode *jNode; - u32 totalSize = 0; - u32 latestVersion = 0; - long ret; - -#ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS - /* Find file size before loading any data, so fragments that - * start past the end of file can be ignored. A fragment - * that is partially in the file is loaded, so extra data may - * be loaded up to the next 4K boundary above the file size. - * This shouldn't cause trouble when loading kernel images, so - * we will live with it. - */ - for (jNode = (struct b_inode *)pL->frag.listHead; jNode; jNode = jNode->next) { - if ((ino == jNode->ino)) { - /* get actual file length from the newest node */ - if (jNode->version >= latestVersion) { - totalSize = jNode->isize; - latestVersion = jNode->version; - } - } - } -#endif - - for (jNode = (struct b_inode *)pL->frag.listHead; jNode; jNode = jNode->next) { - if ((ino != jNode->ino)) - continue; -#ifndef CONFIG_SYS_JFFS2_SORT_FRAGMENTS - /* get actual file length from the newest node */ - if (jNode->version >= latestVersion) { - totalSize = jNode->isize; - latestVersion = jNode->version; - } -#endif - if (dest || stat) { - char *src, *dst; - char data[4096 + sizeof(struct jffs2_raw_inode)]; - struct jffs2_raw_inode *inode; - size_t len; - - inode = (struct jffs2_raw_inode *)&data; - len = sizeof(struct jffs2_raw_inode); - if (dest) - len += jNode->csize; - nand_read(mtd, jNode->offset, &len, inode); - /* ignore data behind latest known EOF */ - if (inode->offset > totalSize) - continue; - - if (stat) { - stat->st_mtime = inode->mtime; - stat->st_mode = inode->mode; - stat->st_ino = inode->ino; - stat->st_size = totalSize; - } - - if (!dest) - continue; - - src = ((char *) inode) + sizeof(struct jffs2_raw_inode); - dst = (char *) (dest + inode->offset); - - switch (inode->compr) { - case JFFS2_COMPR_NONE: - ret = 0; - memcpy(dst, src, inode->dsize); - break; - case JFFS2_COMPR_ZERO: - ret = 0; - memset(dst, 0, inode->dsize); - break; - case JFFS2_COMPR_RTIME: - ret = 0; - rtime_decompress(src, dst, inode->csize, inode->dsize); - break; - case JFFS2_COMPR_DYNRUBIN: - /* this is slow but it works */ - ret = 0; - dynrubin_decompress(src, dst, inode->csize, inode->dsize); - break; - case JFFS2_COMPR_ZLIB: - ret = zlib_decompress(src, dst, inode->csize, inode->dsize); - break; -#if defined(CONFIG_JFFS2_LZO) - case JFFS2_COMPR_LZO: - ret = lzo_decompress(src, dst, inode->csize, inode->dsize); - break; -#endif - default: - /* unknown */ - putLabeledWord("UNKNOWN COMPRESSION METHOD = ", inode->compr); - return -1; - } - } - } - - return totalSize; -} - -/* find the inode from the slashless name given a parent */ -static u32 -jffs2_1pass_find_inode(struct b_lists * pL, const char *name, u32 pino) -{ - struct b_dirent *jDir; - int len = strlen(name); /* name is assumed slash free */ - unsigned int nhash = full_name_hash(name, len); - u32 version = 0; - u32 inode = 0; - - /* we need to search all and return the inode with the highest version */ - for (jDir = (struct b_dirent *)pL->dir.listHead; jDir; jDir = jDir->next) { - if ((pino == jDir->pino) && (jDir->ino) && /* 0 for unlink */ - (len == jDir->nsize) && (nhash == jDir->nhash)) { - /* TODO: compare name */ - if (jDir->version < version) - continue; - - if (jDir->version == version && inode != 0) { - /* I'm pretty sure this isn't legal */ - putstr(" ** ERROR ** "); -/* putnstr(jDir->name, jDir->nsize); */ -/* putLabeledWord(" has dup version =", version); */ - } - inode = jDir->ino; - version = jDir->version; - } - } - return inode; -} - -char *mkmodestr(unsigned long mode, char *str) -{ - static const char *l = "xwr"; - int mask = 1, i; - char c; - - switch (mode & S_IFMT) { - case S_IFDIR: str[0] = 'd'; break; - case S_IFBLK: str[0] = 'b'; break; - case S_IFCHR: str[0] = 'c'; break; - case S_IFIFO: str[0] = 'f'; break; - case S_IFLNK: str[0] = 'l'; break; - case S_IFSOCK: str[0] = 's'; break; - case S_IFREG: str[0] = '-'; break; - default: str[0] = '?'; - } - - for(i = 0; i < 9; i++) { - c = l[i%3]; - str[9-i] = (mode & mask)?c:'-'; - mask = mask<<1; - } - - if(mode & S_ISUID) str[3] = (mode & S_IXUSR)?'s':'S'; - if(mode & S_ISGID) str[6] = (mode & S_IXGRP)?'s':'S'; - if(mode & S_ISVTX) str[9] = (mode & S_IXOTH)?'t':'T'; - str[10] = '\0'; - return str; -} - -static inline void dump_stat(struct stat *st, const char *name) -{ - char str[20]; - char s[64], *p; - - if (st->st_mtime == (time_t)(-1)) /* some ctimes really hate -1 */ - st->st_mtime = 1; - - ctime_r(&st->st_mtime, s/*,64*/); /* newlib ctime doesn't have buflen */ - - if ((p = strchr(s,'\n')) != NULL) *p = '\0'; - if ((p = strchr(s,'\r')) != NULL) *p = '\0'; - -/* - printf("%6lo %s %8ld %s %s\n", st->st_mode, mkmodestr(st->st_mode, str), - st->st_size, s, name); -*/ - - printf(" %s %8ld %s %s", mkmodestr(st->st_mode,str), st->st_size, s, name); -} - -static inline int -dump_inode(struct b_lists *pL, struct b_dirent *d, struct b_inode *i) -{ - char fname[JFFS2_MAX_NAME_LEN + 1]; - struct stat st; - size_t len; - - if(!d || !i) return -1; - len = d->nsize; - nand_read(mtd, d->offset + sizeof(struct jffs2_raw_dirent), - &len, &fname); - fname[d->nsize] = '\0'; - - memset(&st, 0, sizeof(st)); - - jffs2_1pass_read_inode(pL, i->ino, NULL, &st); - - dump_stat(&st, fname); -/* FIXME - if (d->type == DT_LNK) { - unsigned char *src = (unsigned char *) (&i[1]); - putstr(" -> "); - putnstr(src, (int)i->dsize); - } -*/ - putstr("\r\n"); - - return 0; -} - -/* list inodes with the given pino */ -static u32 -jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino) -{ - struct b_dirent *jDir; - u32 i_version = 0; - - for (jDir = (struct b_dirent *)pL->dir.listHead; jDir; jDir = jDir->next) { - if ((pino == jDir->pino) && (jDir->ino)) { /* ino=0 -> unlink */ - struct b_inode *jNode = (struct b_inode *)pL->frag.listHead; - struct b_inode *i = NULL; - - while (jNode) { - if (jNode->ino == jDir->ino && jNode->version >= i_version) { - i_version = jNode->version; - i = jNode; - } - jNode = jNode->next; - } - dump_inode(pL, jDir, i); - } - } - return pino; -} - -static u32 -jffs2_1pass_search_inode(struct b_lists * pL, const char *fname, u32 pino) -{ - int i; - char tmp[256]; - char working_tmp[256]; - char *c; - - /* discard any leading slash */ - i = 0; - while (fname[i] == '/') - i++; - strcpy(tmp, &fname[i]); - - while ((c = (char *) strchr(tmp, '/'))) /* we are still dired searching */ - { - strncpy(working_tmp, tmp, c - tmp); - working_tmp[c - tmp] = '\0'; -#if 0 - putstr("search_inode: tmp = "); - putstr(tmp); - putstr("\r\n"); - putstr("search_inode: wtmp = "); - putstr(working_tmp); - putstr("\r\n"); - putstr("search_inode: c = "); - putstr(c); - putstr("\r\n"); -#endif - for (i = 0; i < strlen(c) - 1; i++) - tmp[i] = c[i + 1]; - tmp[i] = '\0'; -#if 0 - putstr("search_inode: post tmp = "); - putstr(tmp); - putstr("\r\n"); -#endif - - if (!(pino = jffs2_1pass_find_inode(pL, working_tmp, pino))) { - putstr("find_inode failed for name="); - putstr(working_tmp); - putstr("\r\n"); - return 0; - } - } - /* this is for the bare filename, directories have already been mapped */ - if (!(pino = jffs2_1pass_find_inode(pL, tmp, pino))) { - putstr("find_inode failed for name="); - putstr(tmp); - putstr("\r\n"); - return 0; - } - return pino; - -} - -static u32 -jffs2_1pass_resolve_inode(struct b_lists * pL, u32 ino) -{ - struct b_dirent *jDir; - struct b_inode *jNode; - u8 jDirFoundType = 0; - u32 jDirFoundIno = 0; - u32 jDirFoundPino = 0; - char tmp[JFFS2_MAX_NAME_LEN + 1]; - u32 version = 0; - u32 pino; - - /* we need to search all and return the inode with the highest version */ - for (jDir = (struct b_dirent *)pL->dir.listHead; jDir; jDir = jDir->next) { - if (ino == jDir->ino) { - if (jDir->version < version) - continue; - - if (jDir->version == version && jDirFoundType) { - /* I'm pretty sure this isn't legal */ - putstr(" ** ERROR ** "); -/* putnstr(jDir->name, jDir->nsize); */ -/* putLabeledWord(" has dup version (resolve) = ", */ -/* version); */ - } - - jDirFoundType = jDir->type; - jDirFoundIno = jDir->ino; - jDirFoundPino = jDir->pino; - version = jDir->version; - } - } - /* now we found the right entry again. (shoulda returned inode*) */ - if (jDirFoundType != DT_LNK) - return jDirFoundIno; - - /* it's a soft link so we follow it again. */ - for (jNode = (struct b_inode *)pL->frag.listHead; jNode; jNode = jNode->next) { - if (jNode->ino == jDirFoundIno) { - size_t len = jNode->csize; - nand_read(mtd, - jNode->offset + sizeof(struct jffs2_raw_inode), - &len, &tmp); - tmp[jNode->csize] = '\0'; - break; - } - } - /* ok so the name of the new file to find is in tmp */ - /* if it starts with a slash it is root based else shared dirs */ - if (tmp[0] == '/') - pino = 1; - else - pino = jDirFoundPino; - - return jffs2_1pass_search_inode(pL, tmp, pino); -} - -static u32 -jffs2_1pass_search_list_inodes(struct b_lists * pL, const char *fname, u32 pino) -{ - int i; - char tmp[256]; - char working_tmp[256]; - char *c; - - /* discard any leading slash */ - i = 0; - while (fname[i] == '/') - i++; - strcpy(tmp, &fname[i]); - working_tmp[0] = '\0'; - while ((c = (char *) strchr(tmp, '/'))) /* we are still dired searching */ - { - strncpy(working_tmp, tmp, c - tmp); - working_tmp[c - tmp] = '\0'; - for (i = 0; i < strlen(c) - 1; i++) - tmp[i] = c[i + 1]; - tmp[i] = '\0'; - /* only a failure if we arent looking at top level */ - if (!(pino = jffs2_1pass_find_inode(pL, working_tmp, pino)) && - (working_tmp[0])) { - putstr("find_inode failed for name="); - putstr(working_tmp); - putstr("\r\n"); - return 0; - } - } - - if (tmp[0] && !(pino = jffs2_1pass_find_inode(pL, tmp, pino))) { - putstr("find_inode failed for name="); - putstr(tmp); - putstr("\r\n"); - return 0; - } - /* this is for the bare filename, directories have already been mapped */ - if (!(pino = jffs2_1pass_list_inodes(pL, pino))) { - putstr("find_inode failed for name="); - putstr(tmp); - putstr("\r\n"); - return 0; - } - return pino; - -} - -unsigned char -jffs2_1pass_rescan_needed(struct part_info *part) -{ - struct b_node *b; - struct jffs2_unknown_node onode; - struct jffs2_unknown_node *node; - struct b_lists *pL = (struct b_lists *)part->jffs2_priv; - - if (part->jffs2_priv == 0){ - DEBUGF ("rescan: First time in use\n"); - return 1; - } - /* if we have no list, we need to rescan */ - if (pL->frag.listCount == 0) { - DEBUGF ("rescan: fraglist zero\n"); - return 1; - } - - /* or if we are scanning a new partition */ - if (pL->partOffset != part->offset) { - DEBUGF ("rescan: different partition\n"); - return 1; - } - - /* FIXME */ -#if 0 - /* but suppose someone reflashed a partition at the same offset... */ - b = pL->dir.listHead; - while (b) { - node = (struct jffs2_unknown_node *) get_fl_mem(b->offset, - sizeof(onode), &onode); - if (node->nodetype != JFFS2_NODETYPE_DIRENT) { - DEBUGF ("rescan: fs changed beneath me? (%lx)\n", - (unsigned long) b->offset); - return 1; - } - b = b->next; - } -#endif - return 0; -} - -#ifdef DEBUG_FRAGMENTS -static void -dump_fragments(struct b_lists *pL) -{ - struct b_node *b; - struct jffs2_raw_inode ojNode; - struct jffs2_raw_inode *jNode; - - putstr("\r\n\r\n******The fragment Entries******\r\n"); - b = pL->frag.listHead; - while (b) { - jNode = (struct jffs2_raw_inode *) get_fl_mem(b->offset, - sizeof(ojNode), &ojNode); - putLabeledWord("\r\n\tbuild_list: FLASH_OFFSET = ", b->offset); - putLabeledWord("\tbuild_list: totlen = ", jNode->totlen); - putLabeledWord("\tbuild_list: inode = ", jNode->ino); - putLabeledWord("\tbuild_list: version = ", jNode->version); - putLabeledWord("\tbuild_list: isize = ", jNode->isize); - putLabeledWord("\tbuild_list: atime = ", jNode->atime); - putLabeledWord("\tbuild_list: offset = ", jNode->offset); - putLabeledWord("\tbuild_list: csize = ", jNode->csize); - putLabeledWord("\tbuild_list: dsize = ", jNode->dsize); - putLabeledWord("\tbuild_list: compr = ", jNode->compr); - putLabeledWord("\tbuild_list: usercompr = ", jNode->usercompr); - putLabeledWord("\tbuild_list: flags = ", jNode->flags); - putLabeledWord("\tbuild_list: offset = ", b->offset); /* FIXME: ? [RS] */ - b = b->next; - } -} -#endif - -#ifdef DEBUG_DIRENTS -static void -dump_dirents(struct b_lists *pL) -{ - struct b_node *b; - struct jffs2_raw_dirent *jDir; - - putstr("\r\n\r\n******The directory Entries******\r\n"); - b = pL->dir.listHead; - while (b) { - jDir = (struct jffs2_raw_dirent *) get_node_mem(b->offset); - putstr("\r\n"); - putnstr(jDir->name, jDir->nsize); - putLabeledWord("\r\n\tbuild_list: magic = ", jDir->magic); - putLabeledWord("\tbuild_list: nodetype = ", jDir->nodetype); - putLabeledWord("\tbuild_list: hdr_crc = ", jDir->hdr_crc); - putLabeledWord("\tbuild_list: pino = ", jDir->pino); - putLabeledWord("\tbuild_list: version = ", jDir->version); - putLabeledWord("\tbuild_list: ino = ", jDir->ino); - putLabeledWord("\tbuild_list: mctime = ", jDir->mctime); - putLabeledWord("\tbuild_list: nsize = ", jDir->nsize); - putLabeledWord("\tbuild_list: type = ", jDir->type); - putLabeledWord("\tbuild_list: node_crc = ", jDir->node_crc); - putLabeledWord("\tbuild_list: name_crc = ", jDir->name_crc); - putLabeledWord("\tbuild_list: offset = ", b->offset); /* FIXME: ? [RS] */ - b = b->next; - put_fl_mem(jDir); - } -} -#endif - -static int -jffs2_fill_scan_buf(struct mtd_info *mtd, unsigned char *buf, - unsigned ofs, unsigned len) -{ - int ret; - unsigned olen; - - olen = len; - ret = nand_read(mtd, ofs, &olen, buf); - if (ret) { - printf("nand_read(0x%x bytes from 0x%x) returned %d\n", len, ofs, ret); - return ret; - } - if (olen < len) { - printf("Read at 0x%x gave only 0x%x bytes\n", ofs, olen); - return -1; - } - return 0; -} - -#define EMPTY_SCAN_SIZE 1024 -static u32 -jffs2_1pass_build_lists(struct part_info * part) -{ - struct b_lists *pL; - struct jffs2_unknown_node *node; - unsigned nr_blocks, sectorsize, ofs, offset; - char *buf; - int i; - u32 counter = 0; - u32 counter4 = 0; - u32 counterF = 0; - u32 counterN = 0; - - struct mtdids *id = part->dev->id; - mtd = get_nand_dev_by_index(id->num); - if (!mtd) { - pr_err("\nno NAND devices available\n"); - return 0; - } - - /* if we are building a list we need to refresh the cache. */ - jffs_init_1pass_list(part); - pL = (struct b_lists *)part->jffs2_priv; - pL->partOffset = part->offset; - puts ("Scanning JFFS2 FS: "); - - sectorsize = mtd->erasesize; - nr_blocks = part->size / sectorsize; - buf = malloc(sectorsize); - if (!buf) - return 0; - - for (i = 0; i < nr_blocks; i++) { - printf("\b\b%c ", spinner[counter++ % sizeof(spinner)]); - - offset = part->offset + i * sectorsize; - - if (nand_block_isbad(mtd, offset)) - continue; - - if (jffs2_fill_scan_buf(mtd, buf, offset, EMPTY_SCAN_SIZE)) - return 0; - - ofs = 0; - /* Scan only 4KiB of 0xFF before declaring it's empty */ - while (ofs < EMPTY_SCAN_SIZE && *(uint32_t *)(&buf[ofs]) == 0xFFFFFFFF) - ofs += 4; - if (ofs == EMPTY_SCAN_SIZE) - continue; - - if (jffs2_fill_scan_buf(mtd, buf + EMPTY_SCAN_SIZE, offset + EMPTY_SCAN_SIZE, sectorsize - EMPTY_SCAN_SIZE)) - return 0; - offset += ofs; - - while (ofs < sectorsize - sizeof(struct jffs2_unknown_node)) { - node = (struct jffs2_unknown_node *)&buf[ofs]; - if (node->magic != JFFS2_MAGIC_BITMASK || !hdr_crc(node)) { - offset += 4; - ofs += 4; - counter4++; - continue; - } - /* if its a fragment add it */ - if (node->nodetype == JFFS2_NODETYPE_INODE && - inode_crc((struct jffs2_raw_inode *) node)) { - if (insert_inode(&pL->frag, (struct jffs2_raw_inode *) node, - offset) == NULL) { - return 0; - } - } else if (node->nodetype == JFFS2_NODETYPE_DIRENT && - dirent_crc((struct jffs2_raw_dirent *) node) && - dirent_name_crc((struct jffs2_raw_dirent *) node)) { - if (! (counterN%100)) - puts ("\b\b. "); - if (insert_dirent(&pL->dir, (struct jffs2_raw_dirent *) node, - offset) == NULL) { - return 0; - } - counterN++; - } else if (node->nodetype == JFFS2_NODETYPE_CLEANMARKER) { - if (node->totlen != sizeof(struct jffs2_unknown_node)) - printf("OOPS Cleanmarker has bad size " - "%d != %zu\n", - node->totlen, - sizeof(struct jffs2_unknown_node)); - } else if (node->nodetype == JFFS2_NODETYPE_PADDING) { - if (node->totlen < sizeof(struct jffs2_unknown_node)) - printf("OOPS Padding has bad size " - "%d < %zu\n", - node->totlen, - sizeof(struct jffs2_unknown_node)); - } else { - printf("Unknown node type: %x len %d offset 0x%x\n", - node->nodetype, - node->totlen, offset); - } - offset += ((node->totlen + 3) & ~3); - ofs += ((node->totlen + 3) & ~3); - counterF++; - } - } - - putstr("\b\b done.\r\n"); /* close off the dots */ - -#if 0 - putLabeledWord("dir entries = ", pL->dir.listCount); - putLabeledWord("frag entries = ", pL->frag.listCount); - putLabeledWord("+4 increments = ", counter4); - putLabeledWord("+file_offset increments = ", counterF); -#endif - -#ifdef DEBUG_DIRENTS - dump_dirents(pL); -#endif - -#ifdef DEBUG_FRAGMENTS - dump_fragments(pL); -#endif - - /* give visual feedback that we are done scanning the flash */ - led_blink(0x0, 0x0, 0x1, 0x1); /* off, forever, on 100ms, off 100ms */ - free(buf); - - return 1; -} - - -static u32 -jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL) -{ - struct b_node *b; - struct jffs2_raw_inode ojNode; - struct jffs2_raw_inode *jNode; - int i; - - for (i = 0; i < JFFS2_NUM_COMPR; i++) { - piL->compr_info[i].num_frags = 0; - piL->compr_info[i].compr_sum = 0; - piL->compr_info[i].decompr_sum = 0; - } -/* FIXME - b = pL->frag.listHead; - while (b) { - jNode = (struct jffs2_raw_inode *) get_fl_mem(b->offset, - sizeof(ojNode), &ojNode); - if (jNode->compr < JFFS2_NUM_COMPR) { - piL->compr_info[jNode->compr].num_frags++; - piL->compr_info[jNode->compr].compr_sum += jNode->csize; - piL->compr_info[jNode->compr].decompr_sum += jNode->dsize; - } - b = b->next; - } -*/ - return 0; -} - - -static struct b_lists * -jffs2_get_list(struct part_info * part, const char *who) -{ - if (jffs2_1pass_rescan_needed(part)) { - if (!jffs2_1pass_build_lists(part)) { - printf("%s: Failed to scan JFFSv2 file structure\n", who); - return NULL; - } - } - return (struct b_lists *)part->jffs2_priv; -} - - -/* Print directory / file contents */ -u32 -jffs2_1pass_ls(struct part_info * part, const char *fname) -{ - struct b_lists *pl; - long ret = 0; - u32 inode; - - if (! (pl = jffs2_get_list(part, "ls"))) - return 0; - - if (! (inode = jffs2_1pass_search_list_inodes(pl, fname, 1))) { - putstr("ls: Failed to scan jffs2 file structure\r\n"); - return 0; - } - -#if 0 - putLabeledWord("found file at inode = ", inode); - putLabeledWord("read_inode returns = ", ret); -#endif - - return ret; -} - - -/* Load a file from flash into memory. fname can be a full path */ -u32 -jffs2_1pass_load(char *dest, struct part_info * part, const char *fname) -{ - - struct b_lists *pl; - long ret = 0; - u32 inode; - - if (! (pl = jffs2_get_list(part, "load"))) - return 0; - - if (! (inode = jffs2_1pass_search_inode(pl, fname, 1))) { - putstr("load: Failed to find inode\r\n"); - return 0; - } - - /* Resolve symlinks */ - if (! (inode = jffs2_1pass_resolve_inode(pl, inode))) { - putstr("load: Failed to resolve inode structure\r\n"); - return 0; - } - - if ((ret = jffs2_1pass_read_inode(pl, inode, dest, NULL)) < 0) { - putstr("load: Failed to read inode\r\n"); - return 0; - } - - DEBUGF ("load: loaded '%s' to 0x%lx (%ld bytes)\n", fname, - (unsigned long) dest, ret); - return ret; -} - -/* Return information about the fs on this partition */ -u32 -jffs2_1pass_info(struct part_info * part) -{ - struct b_jffs2_info info; - struct b_lists *pl; - int i; - - if (! (pl = jffs2_get_list(part, "info"))) - return 0; - - jffs2_1pass_fill_info(pl, &info); - for (i = 0; i < JFFS2_NUM_COMPR; i++) { - printf ("Compression: %s\n" - "\tfrag count: %d\n" - "\tcompressed sum: %d\n" - "\tuncompressed sum: %d\n", - compr_names[i], - info.compr_info[i].num_frags, - info.compr_info[i].compr_sum, - info.compr_info[i].decompr_sum); - } - return 1; -} diff --git a/fs/jffs2/jffs2_nand_private.h b/fs/jffs2/jffs2_nand_private.h deleted file mode 100644 index 18cca8d076..0000000000 --- a/fs/jffs2/jffs2_nand_private.h +++ /dev/null @@ -1,133 +0,0 @@ -#ifndef jffs2_private_h -#define jffs2_private_h - -#include - -struct b_node { - struct b_node *next; -}; - -struct b_inode { - struct b_inode *next; - u32 offset; /* physical offset to beginning of real inode */ - u32 version; - u32 ino; - u32 isize; - u32 csize; -}; - -struct b_dirent { - struct b_dirent *next; - u32 offset; /* physical offset to beginning of real dirent */ - u32 version; - u32 pino; - u32 ino; - unsigned int nhash; - unsigned char nsize; - unsigned char type; -}; - -struct b_list { - struct b_node *listTail; - struct b_node *listHead; - unsigned int listCount; - struct mem_block *listMemBase; -}; - -struct b_lists { - char *partOffset; - struct b_list dir; - struct b_list frag; -}; - -struct b_compr_info { - u32 num_frags; - u32 compr_sum; - u32 decompr_sum; -}; - -struct b_jffs2_info { - struct b_compr_info compr_info[JFFS2_NUM_COMPR]; -}; - -static inline int -hdr_crc(struct jffs2_unknown_node *node) -{ -#if 1 - u32 crc = crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4); -#else - /* what's the semantics of this? why is this here? */ - u32 crc = crc32_no_comp(~0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4); - - crc ^= ~0; -#endif - if (node->hdr_crc != crc) { - return 0; - } else { - return 1; - } -} - -static inline int -dirent_crc(struct jffs2_raw_dirent *node) -{ - if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_dirent) - 8)) { - return 0; - } else { - return 1; - } -} - -static inline int -dirent_name_crc(struct jffs2_raw_dirent *node) -{ - if (node->name_crc != crc32_no_comp(0, (unsigned char *)&(node->name), node->nsize)) { - return 0; - } else { - return 1; - } -} - -static inline int -inode_crc(struct jffs2_raw_inode *node) -{ - if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_inode) - 8)) { - return 0; - } else { - return 1; - } -} - -/* Borrowed from include/linux/dcache.h */ - -/* Name hashing routines. Initial hash value */ -/* Hash courtesy of the R5 hash in reiserfs modulo sign bits */ -#define init_name_hash() 0 - -/* partial hash update function. Assume roughly 4 bits per character */ -static inline unsigned long -partial_name_hash(unsigned long c, unsigned long prevhash) -{ - return (prevhash + (c << 4) + (c >> 4)) * 11; -} - -/* - * Finally: cut down the number of bits to a int value (and try to avoid - * losing bits) - */ -static inline unsigned long end_name_hash(unsigned long hash) -{ - return (unsigned int) hash; -} - -/* Compute the hash for a name string. */ -static inline unsigned int -full_name_hash(const unsigned char *name, unsigned int len) -{ - unsigned long hash = init_name_hash(); - while (len--) - hash = partial_name_hash(*name++, hash); - return end_name_hash(hash); -} - -#endif /* jffs2_private.h */ From 2bdb42f7c076638eb3dfbdfefc142f37f5e6209d Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 15 Aug 2019 23:54:15 +0200 Subject: [PATCH 05/14] easylogo: avoid buffer overrun MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Building easylogo with `HOST_TOOLS_ALL=y make tools` results in a build warning due to a possible buffer overrun: tools/easylogo/easylogo.c:453:4: note: ‘sprintf’ output between 7 and 262 bytes into a destination of size 256 sprintf (str, "%s, 0x%02x", app, *dataptr++); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Truncate the output to fit into the destination buffer. Signed-off-by: Heinrich Schuchardt --- tools/easylogo/easylogo.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/easylogo/easylogo.c b/tools/easylogo/easylogo.c index 4ba86bf760..ed4bf203dd 100644 --- a/tools/easylogo/easylogo.c +++ b/tools/easylogo/easylogo.c @@ -450,7 +450,8 @@ int image_save_header (image_t * image, char *filename, char *varname) default: strcpy (app, str); - sprintf (str, "%s, 0x%02x", app, *dataptr++); + sprintf(str, "%.*s, 0x%02x", (int)sizeof(str) - 7, app, + *dataptr++); col++; count--; break; From 753e5385ca6d0fe5b5f5a3a97cc96b0f2469ca94 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 19 Aug 2019 11:06:13 +0200 Subject: [PATCH 06/14] test/py: Add cmd_memory dependency back to test_mmc_wr Based on discussion with Stephen Warren there was recommendation to list both memory and random command dependencies just in case that dependency is not properly handled by Kconfig. Fixes: a09c1f7e1c1b ("test/py: Fix MMC/SD block write test dependency") Signed-off-by: Michal Simek Acked-by: Stephen Warren --- test/py/tests/test_mmc_wr.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/tests/test_mmc_wr.py b/test/py/tests/test_mmc_wr.py index 7678c3c9c1..8b18781eac 100644 --- a/test/py/tests/test_mmc_wr.py +++ b/test/py/tests/test_mmc_wr.py @@ -35,7 +35,7 @@ env__mmc_wr_configs = ( """ -@pytest.mark.buildconfigspec('cmd_mmc','cmd_random') +@pytest.mark.buildconfigspec('cmd_mmc','cmd_memory', 'cmd_random') def test_mmc_wr(u_boot_console, env__mmc_wr_config): """Test the "mmc write" command. From e6849e2fd88f16d9592059422173f7f6ab790e07 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 21 Aug 2019 13:35:03 +0000 Subject: [PATCH 07/14] clk: introduce enable_count As what Linux Kernel 5.3.0 provides when enable/disable clk, there is an enable_count in clk_core_disable/enable. Introduce enable_count to track the clk enable/disable count when clk_enable/disable for CCF. And Initialize enable_count to 0 when register the clk. And clk tree dump with enable_count will be supported, it will be easy for us to check the clk status with enable_count Signed-off-by: Peng Fan --- drivers/clk/clk.c | 1 + drivers/clk/clk_fixed_rate.c | 1 + include/clk.h | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 39b3087067..1cf9987f6c 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -40,6 +40,7 @@ int clk_register(struct clk *clk, const char *drv_name, return ret; } + clk->enable_count = 0; /* Store back pointer to clk from udevice */ clk->dev->uclass_priv = clk; diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index 08cce0d79b..f51126793e 100644 --- a/drivers/clk/clk_fixed_rate.c +++ b/drivers/clk/clk_fixed_rate.c @@ -27,6 +27,7 @@ static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev) /* Make fixed rate clock accessible from higher level struct clk */ dev->uclass_priv = clk; clk->dev = dev; + clk->enable_count = 0; return 0; } diff --git a/include/clk.h b/include/clk.h index 3ca2796b57..18b2e3ca54 100644 --- a/include/clk.h +++ b/include/clk.h @@ -61,6 +61,7 @@ struct clk { struct udevice *dev; long long rate; /* in HZ */ u32 flags; + int enable_count; /* * Written by of_xlate. In the future, we might add more fields here. */ From 0520be0f67e358f57f5a1f805b24f39b143e4334 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 21 Aug 2019 13:35:09 +0000 Subject: [PATCH 08/14] clk: prograte clk enable/disable to parent On i.MX8MM, thinking such as clk path OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device Only enabling CCGR GATE is not enough, we also need to enable PLL GATE to make sure the clk path work. So when enabling CCGR GATE, we could prograte to enabling PLL GATE to make life easier. Signed-off-by: Peng Fan --- drivers/clk/clk-uclass.c | 77 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 71 insertions(+), 6 deletions(-) diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index c66b6f3c4e..64c181f4ad 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -449,13 +449,45 @@ int clk_set_parent(struct clk *clk, struct clk *parent) int clk_enable(struct clk *clk) { const struct clk_ops *ops = clk_dev_ops(clk->dev); + struct clk *clkp = NULL; + int ret; debug("%s(clk=%p)\n", __func__, clk); - if (!ops->enable) - return -ENOSYS; + if (CONFIG_IS_ENABLED(CLK_CCF)) { + /* Take id 0 as a non-valid clk, such as dummy */ + if (clk->id && !clk_get_by_id(clk->id, &clkp)) { + if (clkp->enable_count) { + clkp->enable_count++; + return 0; + } + if (clkp->dev->parent && + device_get_uclass_id(clkp->dev) == UCLASS_CLK) { + ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent)); + if (ret) { + printf("Enable %s failed\n", + clkp->dev->parent->name); + return ret; + } + } + } - return ops->enable(clk); + if (ops->enable) { + ret = ops->enable(clk); + if (ret) { + printf("Enable %s failed\n", clk->dev->name); + return ret; + } + } + if (clkp) + clkp->enable_count++; + } else { + if (!ops->enable) + return -ENOSYS; + return ops->enable(clk); + } + + return 0; } int clk_enable_bulk(struct clk_bulk *bulk) @@ -474,13 +506,46 @@ int clk_enable_bulk(struct clk_bulk *bulk) int clk_disable(struct clk *clk) { const struct clk_ops *ops = clk_dev_ops(clk->dev); + struct clk *clkp = NULL; + int ret; debug("%s(clk=%p)\n", __func__, clk); - if (!ops->disable) - return -ENOSYS; + if (CONFIG_IS_ENABLED(CLK_CCF)) { + if (clk->id && !clk_get_by_id(clk->id, &clkp)) { + if (clkp->enable_count == 0) { + printf("clk %s already disabled\n", + clkp->dev->name); + return 0; + } - return ops->disable(clk); + if (--clkp->enable_count > 0) + return 0; + } + + if (ops->disable) { + ret = ops->disable(clk); + if (ret) + return ret; + } + + if (clkp && clkp->dev->parent && + device_get_uclass_id(clkp->dev) == UCLASS_CLK) { + ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent)); + if (ret) { + printf("Disable %s failed\n", + clkp->dev->parent->name); + return ret; + } + } + } else { + if (!ops->disable) + return -ENOSYS; + + return ops->disable(clk); + } + + return 0; } int clk_disable_bulk(struct clk_bulk *bulk) From aeeb2e6d9c67273da5d91f7567657447878eb493 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 21 Aug 2019 13:35:14 +0000 Subject: [PATCH 09/14] clk: support clk tree dump The previous code only dump the clk list. This patch is to support clk tree dump, and also dump the enable_cnt. The code used in patch is similar to dm_dump_all, but the code here only filter out the UCLASS_CLK devices. On i.MX8MM, Partial output: u-boot=> clk dump Rate Usecnt Name ------------------------------------------ 24000000 0 |-- clock-osc-24m 24000000 0 | |-- dram_pll_ref_sel 750000000 0 | | `-- dram_pll 750000000 0 | | `-- dram_pll_bypass 750000000 0 | | `-- dram_pll_out 24000000 0 | |-- arm_pll_ref_sel 1200000000 0 | | `-- arm_pll 1200000000 0 | | `-- arm_pll_bypass 1200000000 0 | | `-- arm_pll_out 1200000000 0 | | `-- arm_a53_src 1200000000 0 | | `-- arm_a53_cg 1200000000 0 | | `-- arm_a53_div 24000000 4 | |-- sys_pll1_ref_sel 800000000 4 | | `-- sys_pll1 800000000 4 | | `-- sys_pll1_bypass 800000000 4 | | `-- sys_pll1_out 40000000 0 | | |-- sys_pll1_40m Signed-off-by: Peng Fan --- cmd/clk.c | 83 ++++++++++++++++++++++++++++++++++--------------------- 1 file changed, 51 insertions(+), 32 deletions(-) diff --git a/cmd/clk.c b/cmd/clk.c index 5402c87de7..74ad868500 100644 --- a/cmd/clk.c +++ b/cmd/clk.c @@ -7,51 +7,70 @@ #include #if defined(CONFIG_DM) && defined(CONFIG_CLK) #include +#include +#include #include +#include #endif +#if defined(CONFIG_DM) && defined(CONFIG_CLK) +static void show_clks(struct udevice *dev, int depth, int last_flag) +{ + int i, is_last; + struct udevice *child; + struct clk *clkp; + u32 rate; + + clkp = dev_get_clk_ptr(dev); + if (device_get_uclass_id(dev) == UCLASS_CLK && clkp) { + rate = clk_get_rate(clkp); + + printf(" %-12u %8d ", rate, clkp->enable_count); + + for (i = depth; i >= 0; i--) { + is_last = (last_flag >> i) & 1; + if (i) { + if (is_last) + printf(" "); + else + printf("| "); + } else { + if (is_last) + printf("`-- "); + else + printf("|-- "); + } + } + + printf("%s\n", dev->name); + } + + list_for_each_entry(child, &dev->child_head, sibling_node) { + is_last = list_is_last(&child->sibling_node, &dev->child_head); + show_clks(child, depth + 1, (last_flag << 1) | is_last); + } +} + int __weak soc_clk_dump(void) { -#if defined(CONFIG_DM) && defined(CONFIG_CLK) - struct udevice *dev; - struct uclass *uc; - struct clk clk; - int ret; - ulong rate; + struct udevice *root; - /* Device addresses start at 1 */ - ret = uclass_get(UCLASS_CLK, &uc); - if (ret) - return ret; - - uclass_foreach_dev(dev, uc) { - memset(&clk, 0, sizeof(clk)); - ret = device_probe(dev); - if (ret) - goto noclk; - - ret = clk_request(dev, &clk); - if (ret) - goto noclk; - - rate = clk_get_rate(&clk); - clk_free(&clk); - - if (rate == -ENODEV) - goto noclk; - - printf("%-30.30s : %lu Hz\n", dev->name, rate); - continue; - noclk: - printf("%-30.30s : ? Hz\n", dev->name); + root = dm_root(); + if (root) { + printf(" Rate Usecnt Name\n"); + printf("------------------------------------------\n"); + show_clks(root, -1, 0); } return 0; +} #else +int __weak soc_clk_dump(void) +{ puts("Not implemented\n"); return 1; -#endif } +#endif static int do_clk_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) From c66f4f5e3018e7df5249ae7e100ad85d9d2cb33f Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 21 Aug 2019 13:35:19 +0000 Subject: [PATCH 10/14] sandbox: clk: add clk enable/disable test code Since we added clk enable_count and prograte clk child enabling operation to clk parent, so add a new function sandbox_clk_enable_count to get enable_count for test usage. And add test code to get the enable_count after we enable/disable the device clk. Signed-off-by: Peng Fan --- drivers/clk/clk_sandbox_ccf.c | 15 +++++++++++++++ include/sandbox-clk.h | 3 +++ test/dm/clk_ccf.c | 28 ++++++++++++++++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c index e126f18d8e..9fa27229e1 100644 --- a/drivers/clk/clk_sandbox_ccf.c +++ b/drivers/clk/clk_sandbox_ccf.c @@ -25,6 +25,18 @@ struct clk_pllv3 { u32 div_shift; }; +int sandbox_clk_enable_count(struct clk *clk) +{ + struct clk *clkp = NULL; + int ret; + + ret = clk_get_by_id(clk->id, &clkp); + if (ret) + return 0; + + return clkp->enable_count; +} + static ulong clk_pllv3_get_rate(struct clk *clk) { unsigned long parent_rate = clk_get_parent_rate(clk); @@ -254,6 +266,9 @@ static int sandbox_clk_ccf_probe(struct udevice *dev) sandbox_clk_composite("i2c", i2c_sels, ARRAY_SIZE(i2c_sels), ®, 0)); + clk_dm(SANDBOX_CLK_I2C_ROOT, + sandbox_clk_gate2("i2c_root", "i2c", base + 0x7c, 0)); + return 0; } diff --git a/include/sandbox-clk.h b/include/sandbox-clk.h index f449de1364..296cddfbb0 100644 --- a/include/sandbox-clk.h +++ b/include/sandbox-clk.h @@ -20,6 +20,7 @@ enum { SANDBOX_CLK_USDHC1_SEL, SANDBOX_CLK_USDHC2_SEL, SANDBOX_CLK_I2C, + SANDBOX_CLK_I2C_ROOT, }; enum sandbox_pllv3_type { @@ -74,4 +75,6 @@ static inline struct clk *sandbox_clk_mux(const char *name, void __iomem *reg, width, 0); } +int sandbox_clk_enable_count(struct clk *clk); + #endif /* __SANDBOX_CLK_H__ */ diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c index bbc4b500e8..ae3a4d8a76 100644 --- a/test/dm/clk_ccf.c +++ b/test/dm/clk_ccf.c @@ -64,6 +64,34 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) rate = clk_get_rate(clk); ut_asserteq(rate, 60000000); +#if CONFIG_IS_ENABLED(CLK_CCF) + /* Test clk tree enable/disable */ + ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk); + ut_assertok(ret); + ut_asserteq_str("i2c_root", clk->dev->name); + + ret = clk_enable(clk); + ut_assertok(ret); + + ret = sandbox_clk_enable_count(clk); + ut_asserteq(ret, 1); + + ret = clk_get_by_id(SANDBOX_CLK_I2C, &pclk); + ut_assertok(ret); + + ret = sandbox_clk_enable_count(pclk); + ut_asserteq(ret, 1); + + ret = clk_disable(clk); + ut_assertok(ret); + + ret = sandbox_clk_enable_count(clk); + ut_asserteq(ret, 0); + + ret = sandbox_clk_enable_count(pclk); + ut_asserteq(ret, 0); +#endif + return 1; } From ccab06689aa2098a9cfca07131ece9f219f4c37b Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 19 Aug 2019 07:53:55 +0000 Subject: [PATCH 11/14] clk: imx: expose CCF entry for all Expose CCF entry, then we could avoid expand the SoC support list Signed-off-by: Peng Fan --- drivers/clk/Kconfig | 2 -- drivers/clk/imx/Kconfig | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a3f0171b45..82cd8f623c 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -48,7 +48,6 @@ config CLK_BOSTON config SPL_CLK_CCF bool "SPL Common Clock Framework [CCF] support " - depends on SPL_CLK_IMX6Q help Enable this option if you want to (re-)use the Linux kernel's Common Clock Framework [CCF] code in U-Boot's SPL. @@ -62,7 +61,6 @@ config SPL_CLK_COMPOSITE_CCF config CLK_CCF bool "Common Clock Framework [CCF] support " - depends on CLK_IMX6Q || SANDBOX_CLK_CCF help Enable this option if you want to (re-)use the Linux kernel's Common Clock Framework [CCF] code in U-Boot's clock driver. diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig index 3e6a980c8c..aae69cf9b0 100644 --- a/drivers/clk/imx/Kconfig +++ b/drivers/clk/imx/Kconfig @@ -20,3 +20,19 @@ config CLK_IMX8 select CLK help This enables support clock driver for i.MX8 platforms. + +config SPL_CLK_IMX8MM + bool "SPL clock support for i.MX8MM" + depends on ARCH_IMX8M && SPL + select SPL_CLK + select SPL_CLK_CCF + help + This enables SPL DM/DTS support for clock driver in i.MX8MM + +config CLK_IMX8MM + bool "Clock support for i.MX8MM" + depends on ARCH_IMX8M + select CLK + select CLK_CCF + help + This enables support clock driver for i.MX8MM platforms. From bbb5871b8d172a72bf1e5e3ecb4259daa4c38332 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 19 Aug 2019 07:53:58 +0000 Subject: [PATCH 12/14] clk: imx: add pll14xx driver Add pll14xx driver for i.MX8MM usage, modifed from Linux Kernel 5.3.0-rc1 Signed-off-by: Peng Fan --- drivers/clk/imx/clk-pll14xx.c | 381 ++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk.h | 25 +++ 2 files changed, 406 insertions(+) create mode 100644 drivers/clk/imx/clk-pll14xx.c diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c new file mode 100644 index 0000000000..2246beb21b --- /dev/null +++ b/drivers/clk/imx/clk-pll14xx.c @@ -0,0 +1,381 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2017-2019 NXP. + * + * Peng Fan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +#define UBOOT_DM_CLK_IMX_PLL1443X "imx_clk_pll1443x" +#define UBOOT_DM_CLK_IMX_PLL1416X "imx_clk_pll1416x" + +#define GNRL_CTL 0x0 +#define DIV_CTL 0x4 +#define LOCK_STATUS BIT(31) +#define LOCK_SEL_MASK BIT(29) +#define CLKE_MASK BIT(11) +#define RST_MASK BIT(9) +#define BYPASS_MASK BIT(4) +#define MDIV_SHIFT 12 +#define MDIV_MASK GENMASK(21, 12) +#define PDIV_SHIFT 4 +#define PDIV_MASK GENMASK(9, 4) +#define SDIV_SHIFT 0 +#define SDIV_MASK GENMASK(2, 0) +#define KDIV_SHIFT 0 +#define KDIV_MASK GENMASK(15, 0) + +#define LOCK_TIMEOUT_US 10000 + +struct clk_pll14xx { + struct clk clk; + void __iomem *base; + enum imx_pll14xx_type type; + const struct imx_pll14xx_rate_table *rate_table; + int rate_count; +}; + +#define to_clk_pll14xx(_clk) container_of(_clk, struct clk_pll14xx, clk) + +static const struct imx_pll14xx_rate_table *imx_get_pll_settings( + struct clk_pll14xx *pll, unsigned long rate) +{ + const struct imx_pll14xx_rate_table *rate_table = pll->rate_table; + int i; + + for (i = 0; i < pll->rate_count; i++) + if (rate == rate_table[i].rate) + return &rate_table[i]; + + return NULL; +} + +static unsigned long clk_pll1416x_recalc_rate(struct clk *clk) +{ + struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); + u64 fvco = clk_get_parent_rate(clk); + u32 mdiv, pdiv, sdiv, pll_div; + + pll_div = readl(pll->base + 4); + mdiv = (pll_div & MDIV_MASK) >> MDIV_SHIFT; + pdiv = (pll_div & PDIV_MASK) >> PDIV_SHIFT; + sdiv = (pll_div & SDIV_MASK) >> SDIV_SHIFT; + + fvco *= mdiv; + do_div(fvco, pdiv << sdiv); + + return fvco; +} + +static unsigned long clk_pll1443x_recalc_rate(struct clk *clk) +{ + struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); + u64 fvco = clk_get_parent_rate(clk); + u32 mdiv, pdiv, sdiv, pll_div_ctl0, pll_div_ctl1; + short int kdiv; + + pll_div_ctl0 = readl(pll->base + 4); + pll_div_ctl1 = readl(pll->base + 8); + mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT; + pdiv = (pll_div_ctl0 & PDIV_MASK) >> PDIV_SHIFT; + sdiv = (pll_div_ctl0 & SDIV_MASK) >> SDIV_SHIFT; + kdiv = pll_div_ctl1 & KDIV_MASK; + + /* fvco = (m * 65536 + k) * Fin / (p * 65536) */ + fvco *= (mdiv * 65536 + kdiv); + pdiv *= 65536; + + do_div(fvco, pdiv << sdiv); + + return fvco; +} + +static inline bool clk_pll1416x_mp_change(const struct imx_pll14xx_rate_table *rate, + u32 pll_div) +{ + u32 old_mdiv, old_pdiv; + + old_mdiv = (pll_div & MDIV_MASK) >> MDIV_SHIFT; + old_pdiv = (pll_div & PDIV_MASK) >> PDIV_SHIFT; + + return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv; +} + +static inline bool clk_pll1443x_mpk_change(const struct imx_pll14xx_rate_table *rate, + u32 pll_div_ctl0, u32 pll_div_ctl1) +{ + u32 old_mdiv, old_pdiv, old_kdiv; + + old_mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT; + old_pdiv = (pll_div_ctl0 & PDIV_MASK) >> PDIV_SHIFT; + old_kdiv = (pll_div_ctl1 & KDIV_MASK) >> KDIV_SHIFT; + + return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv || + rate->kdiv != old_kdiv; +} + +static inline bool clk_pll1443x_mp_change(const struct imx_pll14xx_rate_table *rate, + u32 pll_div_ctl0, u32 pll_div_ctl1) +{ + u32 old_mdiv, old_pdiv, old_kdiv; + + old_mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT; + old_pdiv = (pll_div_ctl0 & PDIV_MASK) >> PDIV_SHIFT; + old_kdiv = (pll_div_ctl1 & KDIV_MASK) >> KDIV_SHIFT; + + return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv || + rate->kdiv != old_kdiv; +} + +static int clk_pll14xx_wait_lock(struct clk_pll14xx *pll) +{ + u32 val; + + return readl_poll_timeout(pll->base, val, val & LOCK_TIMEOUT_US, + LOCK_TIMEOUT_US); +} + +static ulong clk_pll1416x_set_rate(struct clk *clk, unsigned long drate) +{ + struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); + const struct imx_pll14xx_rate_table *rate; + u32 tmp, div_val; + int ret; + + rate = imx_get_pll_settings(pll, drate); + if (!rate) { + pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__, + drate, "xxxx"); + return -EINVAL; + } + + tmp = readl(pll->base + 4); + + if (!clk_pll1416x_mp_change(rate, tmp)) { + tmp &= ~(SDIV_MASK) << SDIV_SHIFT; + tmp |= rate->sdiv << SDIV_SHIFT; + writel(tmp, pll->base + 4); + + return clk_pll1416x_recalc_rate(clk); + } + + /* Bypass clock and set lock to pll output lock */ + tmp = readl(pll->base); + tmp |= LOCK_SEL_MASK; + writel(tmp, pll->base); + + /* Enable RST */ + tmp &= ~RST_MASK; + writel(tmp, pll->base); + + /* Enable BYPASS */ + tmp |= BYPASS_MASK; + writel(tmp, pll->base); + + + div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) | + (rate->sdiv << SDIV_SHIFT); + writel(div_val, pll->base + 0x4); + + /* + * According to SPEC, t3 - t2 need to be greater than + * 1us and 1/FREF, respectively. + * FREF is FIN / Prediv, the prediv is [1, 63], so choose + * 3us. + */ + udelay(3); + + /* Disable RST */ + tmp |= RST_MASK; + writel(tmp, pll->base); + + /* Wait Lock */ + ret = clk_pll14xx_wait_lock(pll); + if (ret) + return ret; + + /* Bypass */ + tmp &= ~BYPASS_MASK; + writel(tmp, pll->base); + + return clk_pll1416x_recalc_rate(clk); +} + +static ulong clk_pll1443x_set_rate(struct clk *clk, unsigned long drate) +{ + struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); + const struct imx_pll14xx_rate_table *rate; + u32 tmp, div_val; + int ret; + + rate = imx_get_pll_settings(pll, drate); + if (!rate) { + pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__, + drate, "==="); + return -EINVAL; + } + + tmp = readl(pll->base + 4); + div_val = readl(pll->base + 8); + + if (!clk_pll1443x_mpk_change(rate, tmp, div_val)) { + tmp &= ~(SDIV_MASK) << SDIV_SHIFT; + tmp |= rate->sdiv << SDIV_SHIFT; + writel(tmp, pll->base + 4); + + return clk_pll1443x_recalc_rate(clk); + } + + tmp = readl(pll->base); + + /* Enable RST */ + tmp &= ~RST_MASK; + writel(tmp, pll->base); + + /* Enable BYPASS */ + tmp |= BYPASS_MASK; + writel(tmp, pll->base); + + div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) | + (rate->sdiv << SDIV_SHIFT); + writel(div_val, pll->base + 0x4); + writel(rate->kdiv << KDIV_SHIFT, pll->base + 0x8); + + /* + * According to SPEC, t3 - t2 need to be greater than + * 1us and 1/FREF, respectively. + * FREF is FIN / Prediv, the prediv is [1, 63], so choose + * 3us. + */ + udelay(3); + + /* Disable RST */ + tmp |= RST_MASK; + writel(tmp, pll->base); + + /* Wait Lock*/ + ret = clk_pll14xx_wait_lock(pll); + if (ret) + return ret; + + /* Bypass */ + tmp &= ~BYPASS_MASK; + writel(tmp, pll->base); + + return clk_pll1443x_recalc_rate(clk); +} + +static int clk_pll14xx_prepare(struct clk *clk) +{ + struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); + u32 val; + + /* + * RESETB = 1 from 0, PLL starts its normal + * operation after lock time + */ + val = readl(pll->base + GNRL_CTL); + val |= RST_MASK; + writel(val, pll->base + GNRL_CTL); + + return clk_pll14xx_wait_lock(pll); +} + +static int clk_pll14xx_unprepare(struct clk *clk) +{ + struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); + u32 val; + + /* + * Set RST to 0, power down mode is enabled and + * every digital block is reset + */ + val = readl(pll->base + GNRL_CTL); + val &= ~RST_MASK; + writel(val, pll->base + GNRL_CTL); + + return 0; +} + +static const struct clk_ops clk_pll1416x_ops = { + .enable = clk_pll14xx_prepare, + .disable = clk_pll14xx_unprepare, + .set_rate = clk_pll1416x_set_rate, + .get_rate = clk_pll1416x_recalc_rate, +}; + +static const struct clk_ops clk_pll1443x_ops = { + .enable = clk_pll14xx_prepare, + .disable = clk_pll14xx_unprepare, + .set_rate = clk_pll1443x_set_rate, + .get_rate = clk_pll1443x_recalc_rate, +}; + +struct clk *imx_clk_pll14xx(const char *name, const char *parent_name, + void __iomem *base, + const struct imx_pll14xx_clk *pll_clk) +{ + struct clk_pll14xx *pll; + struct clk *clk; + char *type_name; + int ret; + + pll = kzalloc(sizeof(*pll), GFP_KERNEL); + if (!pll) + return ERR_PTR(-ENOMEM); + + switch (pll_clk->type) { + case PLL_1416X: + type_name = UBOOT_DM_CLK_IMX_PLL1416X; + break; + case PLL_1443X: + type_name = UBOOT_DM_CLK_IMX_PLL1443X; + break; + default: + pr_err("%s: Unknown pll type for pll clk %s\n", + __func__, name); + return ERR_PTR(-EINVAL); + }; + + pll->base = base; + pll->type = pll_clk->type; + pll->rate_table = pll_clk->rate_table; + pll->rate_count = pll_clk->rate_count; + + clk = &pll->clk; + + ret = clk_register(clk, type_name, name, parent_name); + if (ret) { + pr_err("%s: failed to register pll %s %d\n", + __func__, name, ret); + kfree(pll); + return ERR_PTR(ret); + } + + return clk; +} + +U_BOOT_DRIVER(clk_pll1443x) = { + .name = UBOOT_DM_CLK_IMX_PLL1443X, + .id = UCLASS_CLK, + .ops = &clk_pll1443x_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +U_BOOT_DRIVER(clk_pll1416x) = { + .name = UBOOT_DM_CLK_IMX_PLL1416X, + .id = UCLASS_CLK, + .ops = &clk_pll1416x_ops, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 1d480d8722..4956e04a92 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -20,6 +20,31 @@ enum imx_pllv3_type { IMX_PLLV3_DDR_IMX7, }; +enum imx_pll14xx_type { + PLL_1416X, + PLL_1443X, +}; + +/* NOTE: Rate table should be kept sorted in descending order. */ +struct imx_pll14xx_rate_table { + unsigned int rate; + unsigned int pdiv; + unsigned int mdiv; + unsigned int sdiv; + unsigned int kdiv; +}; + +struct imx_pll14xx_clk { + enum imx_pll14xx_type type; + const struct imx_pll14xx_rate_table *rate_table; + int rate_count; + int flags; +}; + +struct clk *imx_clk_pll14xx(const char *name, const char *parent_name, + void __iomem *base, + const struct imx_pll14xx_clk *pll_clk); + struct clk *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 cgr_val, From 543fdc2a16b1a740a9e82463a01a4498e4bfe7c7 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 19 Aug 2019 07:54:01 +0000 Subject: [PATCH 13/14] clk: imx: add i.MX8M composite clk support Import i.MX8M composite clk from Linux Kernel 5.3.0-rc2 Signed-off-by: Peng Fan --- drivers/clk/imx/clk-composite-8m.c | 170 +++++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) create mode 100644 drivers/clk/imx/clk-composite-8m.c diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c new file mode 100644 index 0000000000..95120d6559 --- /dev/null +++ b/drivers/clk/imx/clk-composite-8m.c @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2019 NXP + */ + +#include +#include +#include +#include +#include +#include +#include +#include "clk.h" + +#define UBOOT_DM_CLK_IMX_COMPOSITE "imx_clk_composite" + +#define PCG_PREDIV_SHIFT 16 +#define PCG_PREDIV_WIDTH 3 +#define PCG_PREDIV_MAX 8 + +#define PCG_DIV_SHIFT 0 +#define PCG_DIV_WIDTH 6 +#define PCG_DIV_MAX 64 + +#define PCG_PCS_SHIFT 24 +#define PCG_PCS_MASK 0x7 + +#define PCG_CGC_SHIFT 28 + +static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk *clk) +{ + struct clk_divider *divider = (struct clk_divider *)to_clk_divider(clk); + struct clk_composite *composite = (struct clk_composite *)clk->data; + ulong parent_rate = clk_get_parent_rate(&composite->clk); + unsigned long prediv_rate; + unsigned int prediv_value; + unsigned int div_value; + + debug("%s: name %s prate: %lu reg: %p\n", __func__, + (&composite->clk)->dev->name, parent_rate, divider->reg); + prediv_value = readl(divider->reg) >> divider->shift; + prediv_value &= clk_div_mask(divider->width); + + prediv_rate = divider_recalc_rate(clk, parent_rate, prediv_value, + NULL, divider->flags, + divider->width); + + div_value = readl(divider->reg) >> PCG_DIV_SHIFT; + div_value &= clk_div_mask(PCG_DIV_WIDTH); + + return divider_recalc_rate(clk, prediv_rate, div_value, NULL, + divider->flags, PCG_DIV_WIDTH); +} + +static int imx8m_clk_composite_compute_dividers(unsigned long rate, + unsigned long parent_rate, + int *prediv, int *postdiv) +{ + int div1, div2; + int error = INT_MAX; + int ret = -EINVAL; + + *prediv = 1; + *postdiv = 1; + + for (div1 = 1; div1 <= PCG_PREDIV_MAX; div1++) { + for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { + int new_error = ((parent_rate / div1) / div2) - rate; + + if (abs(new_error) < abs(error)) { + *prediv = div1; + *postdiv = div2; + error = new_error; + ret = 0; + } + } + } + return ret; +} + +/* + * The clk are bound to a dev, because it is part of composite clk + * use composite clk to get dev + */ +static ulong imx8m_clk_composite_divider_set_rate(struct clk *clk, + unsigned long rate) +{ + struct clk_divider *divider = (struct clk_divider *)to_clk_divider(clk); + struct clk_composite *composite = (struct clk_composite *)clk->data; + ulong parent_rate = clk_get_parent_rate(&composite->clk); + int prediv_value; + int div_value; + int ret; + u32 val; + + ret = imx8m_clk_composite_compute_dividers(rate, parent_rate, + &prediv_value, &div_value); + if (ret) + return ret; + + val = readl(divider->reg); + val &= ~((clk_div_mask(divider->width) << divider->shift) | + (clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT)); + + val |= (u32)(prediv_value - 1) << divider->shift; + val |= (u32)(div_value - 1) << PCG_DIV_SHIFT; + writel(val, divider->reg); + + return clk_get_rate(&composite->clk); +} + +static const struct clk_ops imx8m_clk_composite_divider_ops = { + .get_rate = imx8m_clk_composite_divider_recalc_rate, + .set_rate = imx8m_clk_composite_divider_set_rate, +}; + +struct clk *imx8m_clk_composite_flags(const char *name, + const char * const *parent_names, + int num_parents, void __iomem *reg, + unsigned long flags) +{ + struct clk *clk = ERR_PTR(-ENOMEM); + struct clk_divider *div = NULL; + struct clk_gate *gate = NULL; + struct clk_mux *mux = NULL; + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) + goto fail; + + mux->reg = reg; + mux->shift = PCG_PCS_SHIFT; + mux->mask = PCG_PCS_MASK; + mux->num_parents = num_parents; + mux->flags = flags; + mux->parent_names = parent_names; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + goto fail; + + div->reg = reg; + div->shift = PCG_PREDIV_SHIFT; + div->width = PCG_PREDIV_WIDTH; + div->flags = CLK_DIVIDER_ROUND_CLOSEST | flags; + + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (!gate) + goto fail; + + gate->reg = reg; + gate->bit_idx = PCG_CGC_SHIFT; + gate->flags = flags; + + clk = clk_register_composite(NULL, name, + parent_names, num_parents, + &mux->clk, &clk_mux_ops, &div->clk, + &imx8m_clk_composite_divider_ops, + &gate->clk, &clk_gate_ops, flags); + if (IS_ERR(clk)) + goto fail; + + return clk; + +fail: + kfree(gate); + kfree(div); + kfree(mux); + return ERR_CAST(clk); +} From f62ec5c4bba2556202523b0f48655dacbe90753a Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 19 Aug 2019 07:54:04 +0000 Subject: [PATCH 14/14] clk: imx: add i.MX8MM clk driver Add i.MX8MM clk driver support. Signed-off-by: Peng Fan --- drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-imx8mm.c | 415 +++++++++++++++++++++++++++++++++++ 2 files changed, 417 insertions(+) create mode 100644 drivers/clk/imx/clk-imx8mm.c diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 105a58ca90..5ad7967fe9 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -10,3 +10,5 @@ ifdef CONFIG_CLK_IMX8 obj-$(CONFIG_IMX8QXP) += clk-imx8qxp.o obj-$(CONFIG_IMX8QM) += clk-imx8qm.o endif +obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MM) += clk-imx8mm.o clk-pll14xx.o \ + clk-composite-8m.o diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c new file mode 100644 index 0000000000..f4913e70ab --- /dev/null +++ b/drivers/clk/imx/clk-imx8mm.c @@ -0,0 +1,415 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2019 NXP + * Peng Fan + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +#define PLL_1416X_RATE(_rate, _m, _p, _s) \ + { \ + .rate = (_rate), \ + .mdiv = (_m), \ + .pdiv = (_p), \ + .sdiv = (_s), \ + } + +#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ + { \ + .rate = (_rate), \ + .mdiv = (_m), \ + .pdiv = (_p), \ + .sdiv = (_s), \ + .kdiv = (_k), \ + } + +static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = { + PLL_1416X_RATE(1800000000U, 225, 3, 0), + PLL_1416X_RATE(1600000000U, 200, 3, 0), + PLL_1416X_RATE(1200000000U, 300, 3, 1), + PLL_1416X_RATE(1000000000U, 250, 3, 1), + PLL_1416X_RATE(800000000U, 200, 3, 1), + PLL_1416X_RATE(750000000U, 250, 2, 2), + PLL_1416X_RATE(700000000U, 350, 3, 2), + PLL_1416X_RATE(600000000U, 300, 3, 2), +}; + +static const struct imx_pll14xx_rate_table imx8mm_drampll_tbl[] = { + PLL_1443X_RATE(650000000U, 325, 3, 2, 0), +}; + +static struct imx_pll14xx_clk imx8mm_dram_pll __initdata = { + .type = PLL_1443X, + .rate_table = imx8mm_drampll_tbl, + .rate_count = ARRAY_SIZE(imx8mm_drampll_tbl), +}; + +static struct imx_pll14xx_clk imx8mm_arm_pll __initdata = { + .type = PLL_1416X, + .rate_table = imx8mm_pll1416x_tbl, + .rate_count = ARRAY_SIZE(imx8mm_pll1416x_tbl), +}; + +static struct imx_pll14xx_clk imx8mm_sys_pll __initdata = { + .type = PLL_1416X, + .rate_table = imx8mm_pll1416x_tbl, + .rate_count = ARRAY_SIZE(imx8mm_pll1416x_tbl), +}; + +static const char *pll_ref_sels[] = { "clock-osc-24m", "dummy", "dummy", "dummy", }; +static const char *dram_pll_bypass_sels[] = {"dram_pll", "dram_pll_ref_sel", }; +static const char *arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; +static const char *sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_sel", }; +static const char *sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; +static const char *sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; + +static const char *imx8mm_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", + "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; + +static const char *imx8mm_ahb_sels[] = {"osc_24m", "sys_pll1_133m", "sys_pll1_800m", "sys_pll1_400m", + "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", }; + +static const char *imx8mm_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m", + "sys_pll2_200m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out", }; + +static const char *imx8mm_nand_usdhc_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_200m", + "sys_pll1_133m", "sys_pll3_out", "sys_pll2_250m", "audio_pll1_out", }; + +static const char *imx8mm_usdhc1_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m", + "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", }; + +static const char *imx8mm_usdhc2_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m", + "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", }; + +static const char *imx8mm_i2c1_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", + "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; + +static const char *imx8mm_i2c2_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", + "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; + +static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", + "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; + +static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", + "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; + +static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_160m", "vpu_pll_out", + "sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", }; + +static const char *imx8mm_usdhc3_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m", + "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", }; + +static ulong imx8mm_clk_get_rate(struct clk *clk) +{ + struct clk *c; + int ret; + + debug("%s(#%lu)\n", __func__, clk->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) + return ret; + + return clk_get_rate(c); +} + +static ulong imx8mm_clk_set_rate(struct clk *clk, unsigned long rate) +{ + struct clk *c; + int ret; + + debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + ret = clk_get_by_id(clk->id, &c); + if (ret) + return ret; + + return clk_set_rate(c, rate); +} + +static int __imx8mm_clk_enable(struct clk *clk, bool enable) +{ + struct clk *c; + int ret; + + debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = clk_get_by_id(clk->id, &c); + if (ret) + return ret; + + if (enable) + ret = clk_enable(c); + else + ret = clk_disable(c); + + return ret; +} + +static int imx8mm_clk_disable(struct clk *clk) +{ + return __imx8mm_clk_enable(clk, 0); +} + +static int imx8mm_clk_enable(struct clk *clk) +{ + return __imx8mm_clk_enable(clk, 1); +} + +static struct clk_ops imx8mm_clk_ops = { + .set_rate = imx8mm_clk_set_rate, + .get_rate = imx8mm_clk_get_rate, + .enable = imx8mm_clk_enable, + .disable = imx8mm_clk_disable, +}; + +static int imx8mm_clk_probe(struct udevice *dev) +{ + void __iomem *base; + + base = (void *)ANATOP_BASE_ADDR; + + clk_dm(IMX8MM_DRAM_PLL_REF_SEL, + imx_clk_mux("dram_pll_ref_sel", base + 0x50, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + clk_dm(IMX8MM_ARM_PLL_REF_SEL, + imx_clk_mux("arm_pll_ref_sel", base + 0x84, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + clk_dm(IMX8MM_SYS_PLL1_REF_SEL, + imx_clk_mux("sys_pll1_ref_sel", base + 0x94, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + clk_dm(IMX8MM_SYS_PLL2_REF_SEL, + imx_clk_mux("sys_pll2_ref_sel", base + 0x104, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + clk_dm(IMX8MM_SYS_PLL3_REF_SEL, + imx_clk_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + + clk_dm(IMX8MM_DRAM_PLL, + imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", + base + 0x50, &imx8mm_dram_pll)); + clk_dm(IMX8MM_ARM_PLL, + imx_clk_pll14xx("arm_pll", "arm_pll_ref_sel", + base + 0x84, &imx8mm_arm_pll)); + clk_dm(IMX8MM_SYS_PLL1, + imx_clk_pll14xx("sys_pll1", "sys_pll1_ref_sel", + base + 0x94, &imx8mm_sys_pll)); + clk_dm(IMX8MM_SYS_PLL2, + imx_clk_pll14xx("sys_pll2", "sys_pll2_ref_sel", + base + 0x104, &imx8mm_sys_pll)); + clk_dm(IMX8MM_SYS_PLL3, + imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", + base + 0x114, &imx8mm_sys_pll)); + + /* PLL bypass out */ + clk_dm(IMX8MM_DRAM_PLL_BYPASS, + imx_clk_mux_flags("dram_pll_bypass", base + 0x50, 4, 1, + dram_pll_bypass_sels, + ARRAY_SIZE(dram_pll_bypass_sels), + CLK_SET_RATE_PARENT)); + clk_dm(IMX8MM_ARM_PLL_BYPASS, + imx_clk_mux_flags("arm_pll_bypass", base + 0x84, 4, 1, + arm_pll_bypass_sels, + ARRAY_SIZE(arm_pll_bypass_sels), + CLK_SET_RATE_PARENT)); + clk_dm(IMX8MM_SYS_PLL1_BYPASS, + imx_clk_mux_flags("sys_pll1_bypass", base + 0x94, 4, 1, + sys_pll1_bypass_sels, + ARRAY_SIZE(sys_pll1_bypass_sels), + CLK_SET_RATE_PARENT)); + clk_dm(IMX8MM_SYS_PLL2_BYPASS, + imx_clk_mux_flags("sys_pll2_bypass", base + 0x104, 4, 1, + sys_pll2_bypass_sels, + ARRAY_SIZE(sys_pll2_bypass_sels), + CLK_SET_RATE_PARENT)); + clk_dm(IMX8MM_SYS_PLL3_BYPASS, + imx_clk_mux_flags("sys_pll3_bypass", base + 0x114, 4, 1, + sys_pll3_bypass_sels, + ARRAY_SIZE(sys_pll3_bypass_sels), + CLK_SET_RATE_PARENT)); + + /* PLL out gate */ + clk_dm(IMX8MM_DRAM_PLL_OUT, + imx_clk_gate("dram_pll_out", "dram_pll_bypass", + base + 0x50, 13)); + clk_dm(IMX8MM_ARM_PLL_OUT, + imx_clk_gate("arm_pll_out", "arm_pll_bypass", + base + 0x84, 11)); + clk_dm(IMX8MM_SYS_PLL1_OUT, + imx_clk_gate("sys_pll1_out", "sys_pll1_bypass", + base + 0x94, 11)); + clk_dm(IMX8MM_SYS_PLL2_OUT, + imx_clk_gate("sys_pll2_out", "sys_pll2_bypass", + base + 0x104, 11)); + clk_dm(IMX8MM_SYS_PLL3_OUT, + imx_clk_gate("sys_pll3_out", "sys_pll3_bypass", + base + 0x114, 11)); + + /* SYS PLL fixed output */ + clk_dm(IMX8MM_SYS_PLL1_40M, + imx_clk_fixed_factor("sys_pll1_40m", "sys_pll1_out", 1, 20)); + clk_dm(IMX8MM_SYS_PLL1_80M, + imx_clk_fixed_factor("sys_pll1_80m", "sys_pll1_out", 1, 10)); + clk_dm(IMX8MM_SYS_PLL1_100M, + imx_clk_fixed_factor("sys_pll1_100m", "sys_pll1_out", 1, 8)); + clk_dm(IMX8MM_SYS_PLL1_133M, + imx_clk_fixed_factor("sys_pll1_133m", "sys_pll1_out", 1, 6)); + clk_dm(IMX8MM_SYS_PLL1_160M, + imx_clk_fixed_factor("sys_pll1_160m", "sys_pll1_out", 1, 5)); + clk_dm(IMX8MM_SYS_PLL1_200M, + imx_clk_fixed_factor("sys_pll1_200m", "sys_pll1_out", 1, 4)); + clk_dm(IMX8MM_SYS_PLL1_266M, + imx_clk_fixed_factor("sys_pll1_266m", "sys_pll1_out", 1, 3)); + clk_dm(IMX8MM_SYS_PLL1_400M, + imx_clk_fixed_factor("sys_pll1_400m", "sys_pll1_out", 1, 2)); + clk_dm(IMX8MM_SYS_PLL1_800M, + imx_clk_fixed_factor("sys_pll1_800m", "sys_pll1_out", 1, 1)); + + clk_dm(IMX8MM_SYS_PLL2_50M, + imx_clk_fixed_factor("sys_pll2_50m", "sys_pll2_out", 1, 20)); + clk_dm(IMX8MM_SYS_PLL2_100M, + imx_clk_fixed_factor("sys_pll2_100m", "sys_pll2_out", 1, 10)); + clk_dm(IMX8MM_SYS_PLL2_125M, + imx_clk_fixed_factor("sys_pll2_125m", "sys_pll2_out", 1, 8)); + clk_dm(IMX8MM_SYS_PLL2_166M, + imx_clk_fixed_factor("sys_pll2_166m", "sys_pll2_out", 1, 6)); + clk_dm(IMX8MM_SYS_PLL2_200M, + imx_clk_fixed_factor("sys_pll2_200m", "sys_pll2_out", 1, 5)); + clk_dm(IMX8MM_SYS_PLL2_250M, + imx_clk_fixed_factor("sys_pll2_250m", "sys_pll2_out", 1, 4)); + clk_dm(IMX8MM_SYS_PLL2_333M, + imx_clk_fixed_factor("sys_pll2_333m", "sys_pll2_out", 1, 3)); + clk_dm(IMX8MM_SYS_PLL2_500M, + imx_clk_fixed_factor("sys_pll2_500m", "sys_pll2_out", 1, 2)); + clk_dm(IMX8MM_SYS_PLL2_1000M, + imx_clk_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1)); + + base = dev_read_addr_ptr(dev); + if (base == (void *)FDT_ADDR_T_NONE) + return -EINVAL; + + clk_dm(IMX8MM_CLK_A53_SRC, + imx_clk_mux2("arm_a53_src", base + 0x8000, 24, 3, + imx8mm_a53_sels, ARRAY_SIZE(imx8mm_a53_sels))); + clk_dm(IMX8MM_CLK_A53_CG, + imx_clk_gate3("arm_a53_cg", "arm_a53_src", base + 0x8000, 28)); + clk_dm(IMX8MM_CLK_A53_DIV, + imx_clk_divider2("arm_a53_div", "arm_a53_cg", + base + 0x8000, 0, 3)); + + clk_dm(IMX8MM_CLK_AHB, + imx8m_clk_composite_critical("ahb", imx8mm_ahb_sels, + base + 0x9000)); + clk_dm(IMX8MM_CLK_IPG_ROOT, + imx_clk_divider2("ipg_root", "ahb", base + 0x9080, 0, 1)); + + clk_dm(IMX8MM_CLK_ENET_AXI, + imx8m_clk_composite("enet_axi", imx8mm_enet_axi_sels, + base + 0x8880)); + clk_dm(IMX8MM_CLK_NAND_USDHC_BUS, + imx8m_clk_composite_critical("nand_usdhc_bus", + imx8mm_nand_usdhc_sels, + base + 0x8900)); + + /* IP */ + clk_dm(IMX8MM_CLK_USDHC1, + imx8m_clk_composite("usdhc1", imx8mm_usdhc1_sels, + base + 0xac00)); + clk_dm(IMX8MM_CLK_USDHC2, + imx8m_clk_composite("usdhc2", imx8mm_usdhc2_sels, + base + 0xac80)); + clk_dm(IMX8MM_CLK_I2C1, + imx8m_clk_composite("i2c1", imx8mm_i2c1_sels, base + 0xad00)); + clk_dm(IMX8MM_CLK_I2C2, + imx8m_clk_composite("i2c2", imx8mm_i2c2_sels, base + 0xad80)); + clk_dm(IMX8MM_CLK_I2C3, + imx8m_clk_composite("i2c3", imx8mm_i2c3_sels, base + 0xae00)); + clk_dm(IMX8MM_CLK_I2C4, + imx8m_clk_composite("i2c4", imx8mm_i2c4_sels, base + 0xae80)); + clk_dm(IMX8MM_CLK_WDOG, + imx8m_clk_composite("wdog", imx8mm_wdog_sels, base + 0xb900)); + clk_dm(IMX8MM_CLK_USDHC3, + imx8m_clk_composite("usdhc3", imx8mm_usdhc3_sels, + base + 0xbc80)); + + clk_dm(IMX8MM_CLK_I2C1_ROOT, + imx_clk_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0)); + clk_dm(IMX8MM_CLK_I2C2_ROOT, + imx_clk_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0)); + clk_dm(IMX8MM_CLK_I2C3_ROOT, + imx_clk_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0)); + clk_dm(IMX8MM_CLK_I2C4_ROOT, + imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0)); + clk_dm(IMX8MM_CLK_OCOTP_ROOT, + imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0)); + clk_dm(IMX8MM_CLK_USDHC1_ROOT, + imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); + clk_dm(IMX8MM_CLK_USDHC2_ROOT, + imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); + clk_dm(IMX8MM_CLK_WDOG1_ROOT, + imx_clk_gate4("wdog1_root_clk", "wdog", base + 0x4530, 0)); + clk_dm(IMX8MM_CLK_WDOG2_ROOT, + imx_clk_gate4("wdog2_root_clk", "wdog", base + 0x4540, 0)); + clk_dm(IMX8MM_CLK_WDOG3_ROOT, + imx_clk_gate4("wdog3_root_clk", "wdog", base + 0x4550, 0)); + clk_dm(IMX8MM_CLK_USDHC3_ROOT, + imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); + +#ifdef CONFIG_SPL_BUILD + struct clk *clkp, *clkp1; + + clk_get_by_id(IMX8MM_CLK_WDOG1_ROOT, &clkp); + clk_enable(clkp); + clk_get_by_id(IMX8MM_CLK_WDOG2_ROOT, &clkp); + clk_enable(clkp); + clk_get_by_id(IMX8MM_CLK_WDOG3_ROOT, &clkp); + clk_enable(clkp); + + /* Configure SYS_PLL3 to 750MHz */ + clk_get_by_id(IMX8MM_SYS_PLL3, &clkp); + clk_set_rate(clkp, 750000000UL); + clk_enable(clkp); + + /* Configure ARM to sys_pll2_500m */ + clk_get_by_id(IMX8MM_CLK_A53_SRC, &clkp); + clk_get_by_id(IMX8MM_SYS_PLL2_OUT, &clkp1); + clk_enable(clkp1); + clk_get_by_id(IMX8MM_SYS_PLL2_500M, &clkp1); + clk_set_parent(clkp, clkp1); + + /* Configure ARM PLL to 1.2GHz */ + clk_get_by_id(IMX8MM_ARM_PLL, &clkp1); + clk_set_rate(clkp1, 1200000000UL); + clk_get_by_id(IMX8MM_ARM_PLL_OUT, &clkp1); + clk_enable(clkp1); + clk_set_parent(clkp, clkp1); + + /* Configure DIV to 1.2GHz */ + clk_get_by_id(IMX8MM_CLK_A53_DIV, &clkp1); + clk_set_rate(clkp1, 1200000000UL); +#endif + + return 0; +} + +static const struct udevice_id imx8mm_clk_ids[] = { + { .compatible = "fsl,imx8mm-ccm" }, + { }, +}; + +U_BOOT_DRIVER(imx8mm_clk) = { + .name = "clk_imx8mm", + .id = UCLASS_CLK, + .of_match = imx8mm_clk_ids, + .ops = &imx8mm_clk_ops, + .probe = imx8mm_clk_probe, + .flags = DM_FLAG_PRE_RELOC, +};