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rockchip: px30: Fixup PMUGRF registers layout order

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According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
This commit is contained in:
Paul Kocialkowski
2019-11-28 15:27:50 +01:00
committed by Kever Yang
parent 1b8114ac1e
commit b0c5e37d0e
1 changed files with 8 additions and 8 deletions
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16
arch/arm/include/asm/arch-rockchip/grf_px30.h
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@@ -112,18 +112,18 @@ struct px30_grf {
check_member(px30_grf, mac_con1, 0x904);
struct px30_pmugrf {
unsigned int gpio0a_e;
unsigned int gpio0b_e;
unsigned int gpio0c_e;
unsigned int gpio0d_e;
unsigned int gpio0a_p;
unsigned int gpio0b_p;
unsigned int gpio0c_p;
unsigned int gpio0d_p;
unsigned int gpio0al_iomux;
unsigned int gpio0bl_iomux;
unsigned int gpio0cl_iomux;
unsigned int gpio0dl_iomux;
unsigned int gpio0a_p;
unsigned int gpio0b_p;
unsigned int gpio0c_p;
unsigned int gpio0d_p;
unsigned int gpio0a_e;
unsigned int gpio0b_e;
unsigned int gpio0c_e;
unsigned int gpio0d_e;
unsigned int gpio0l_sr;
unsigned int gpio0h_sr;
unsigned int gpio0l_smt;