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x86: dts: Move PCI peripherals into a pci node
These peripherals should not be at the top level, since they exist inside the PCI bus. We don't have a full device tree node for pci yet, but we should at least put it at the right level. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
@@ -163,6 +163,7 @@
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};
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};
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};
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pci {
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lpc {
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lpc {
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compatible = "intel,lpc";
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compatible = "intel,lpc";
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#address-cells = <1>;
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#address-cells = <1>;
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@@ -172,7 +173,7 @@
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compatible = "google,cros-ec";
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compatible = "google,cros-ec";
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reg = <0x204 1 0x200 1 0x880 0x80>;
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reg = <0x204 1 0x200 1 0x880 0x80>;
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/* This describes the flash memory within the EC */
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/* Describes the flash memory within the EC */
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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flash@8000000 {
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flash@8000000 {
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@@ -181,6 +182,7 @@
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};
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};
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};
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};
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};
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};
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};
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microcode {
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microcode {
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update@0 {
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update@0 {
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