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net: tsec: Cleanup tsec regs init and fix __iomem warns

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Remove tsec_t typedef.  Define macros as getters of
tsec and mdio register memory regions, for consistent
initialization of various 'regs' fields and also to
manage overly long initialization lines.
Use the __iomem address space marker to address sparse
warnings in tsec.c where IO accessors are used, like:

tsec.c:394:19: warning: incorrect type in argument 1 (different
address spaces)
tsec.c:394:19:    expected unsigned int volatile [noderef]
<asn:2>*addr
tsec.c:394:19:    got unsigned int *<noident>
[...]

Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers
with __iomem pointers for tsec.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
This commit is contained in:
Claudiu Manoil
2013-09-30 12:44:42 +03:00
committed by Joe Hershberger
parent b200204e8e
commit aec84bf671
2 changed files with 38 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/net/tsec.c
View File

@@ -5,7 +5,7 @@
* terms of the GNU Public License, Version 2, incorporated * terms of the GNU Public License, Version 2, incorporated
* herein by reference. * herein by reference.
* *
* Copyright 2004-2011 Freescale Semiconductor, Inc. * Copyright 2004-2011, 2013 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc. * (C) Copyright 2003, Motorola, Inc.
* author Andy Fleming * author Andy Fleming
* *
@@ -52,7 +52,7 @@ static struct tsec_info_struct tsec_info[] = {
#endif #endif
#ifdef CONFIG_MPC85XX_FEC #ifdef CONFIG_MPC85XX_FEC
{ {
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000), .regs = TSEC_GET_REGS(2, 0x2000),
.devname = CONFIG_MPC85XX_FEC_NAME, .devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR, .phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS, .flags = FEC_FLAGS,
@@ -141,7 +141,7 @@ tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set)
* those we don't care about (unless zero is bad, in which case, * those we don't care about (unless zero is bad, in which case,
* choose a more appropriate value) * choose a more appropriate value)
*/ */
static void init_registers(tsec_t *regs) static void init_registers(struct tsec __iomem *regs)
{ {
/* Clear IEVENT */ /* Clear IEVENT */
out_be32(&regs->ievent, IEVENT_INIT_CLEAR); out_be32(&regs->ievent, IEVENT_INIT_CLEAR);
@@ -188,7 +188,7 @@ static void init_registers(tsec_t *regs)
*/ */
static void adjust_link(struct tsec_private *priv, struct phy_device *phydev) static void adjust_link(struct tsec_private *priv, struct phy_device *phydev)
{ {
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
u32 ecntrl, maccfg2; u32 ecntrl, maccfg2;
if (!phydev->link) { if (!phydev->link) {
@@ -242,7 +242,7 @@ static void adjust_link(struct tsec_private *priv, struct phy_device *phydev)
void redundant_init(struct eth_device *dev) void redundant_init(struct eth_device *dev)
{ {
struct tsec_private *priv = dev->priv; struct tsec_private *priv = dev->priv;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
uint t, count = 0; uint t, count = 0;
int fail = 1; int fail = 1;
static const u8 pkt[] = { static const u8 pkt[] = {
@@ -321,7 +321,7 @@ static void startup_tsec(struct eth_device *dev)
{ {
int i; int i;
struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec_private *priv = (struct tsec_private *)dev->priv;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
/* reset the indices to zero */ /* reset the indices to zero */
rxIdx = 0; rxIdx = 0;
@@ -375,7 +375,7 @@ static int tsec_send(struct eth_device *dev, void *packet, int length)
int i; int i;
int result = 0; int result = 0;
struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec_private *priv = (struct tsec_private *)dev->priv;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
/* Find an empty buffer descriptor */ /* Find an empty buffer descriptor */
for (i = 0; rtx.txbd[txIdx].status & TXBD_READY; i++) { for (i = 0; rtx.txbd[txIdx].status & TXBD_READY; i++) {
@@ -411,7 +411,7 @@ static int tsec_recv(struct eth_device *dev)
{ {
int length; int length;
struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec_private *priv = (struct tsec_private *)dev->priv;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
while (!(rtx.rxbd[rxIdx].status & RXBD_EMPTY)) { while (!(rtx.rxbd[rxIdx].status & RXBD_EMPTY)) {
@@ -447,7 +447,7 @@ static int tsec_recv(struct eth_device *dev)
static void tsec_halt(struct eth_device *dev) static void tsec_halt(struct eth_device *dev)
{ {
struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec_private *priv = (struct tsec_private *)dev->priv;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS); clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
setbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS); setbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
@@ -473,7 +473,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
char tmpbuf[MAC_ADDR_LEN]; char tmpbuf[MAC_ADDR_LEN];
int i; int i;
struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec_private *priv = (struct tsec_private *)dev->priv;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
int ret; int ret;
/* Make sure the controller is stopped */ /* Make sure the controller is stopped */
@@ -521,7 +521,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
static phy_interface_t tsec_get_interface(struct tsec_private *priv) static phy_interface_t tsec_get_interface(struct tsec_private *priv)
{ {
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
u32 ecntrl; u32 ecntrl;
ecntrl = in_be32(&regs->ecntrl); ecntrl = in_be32(&regs->ecntrl);
@@ -570,7 +570,7 @@ static int init_phy(struct eth_device *dev)
{ {
struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct phy_device *phydev; struct phy_device *phydev;
tsec_t *regs = priv->regs; struct tsec __iomem *regs = priv->regs;
u32 supported = (SUPPORTED_10baseT_Half | u32 supported = (SUPPORTED_10baseT_Half |
SUPPORTED_10baseT_Full | SUPPORTED_10baseT_Full |
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Half |
@@ -677,7 +677,7 @@ int tsec_standard_init(bd_t *bis)
{ {
struct fsl_pq_mdio_info info; struct fsl_pq_mdio_info info;
info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; info.regs = TSEC_GET_MDIO_REGS_BASE(1);
info.name = DEFAULT_MII_NAME; info.name = DEFAULT_MII_NAME;
fsl_pq_mdio_init(bis, &info); fsl_pq_mdio_init(bis, &info);

39
include/tsec.h
View File

@@ -7,7 +7,7 @@
* terms of the GNU Public License, Version 2, incorporated * terms of the GNU Public License, Version 2, incorporated
* herein by reference. * herein by reference.
* *
* Copyright 2004, 2007, 2009, 2011 Freescale Semiconductor, Inc. * Copyright 2004, 2007, 2009, 2011, 2013 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc. * (C) Copyright 2003, Motorola, Inc.
* maintained by Xianghua Xiao (x.xiao@motorola.com) * maintained by Xianghua Xiao (x.xiao@motorola.com)
* author Andy Fleming * author Andy Fleming
@@ -27,13 +27,26 @@
#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520) #define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520)
#define TSEC_GET_REGS(num, offset) \
(struct tsec __iomem *)\
(TSEC_BASE_ADDR + (((num) - 1) * (offset)))
#define TSEC_GET_REGS_BASE(num) \
TSEC_GET_REGS((num), TSEC_SIZE)
#define TSEC_GET_MDIO_REGS(num, offset) \
(struct tsec_mii_mng __iomem *)\
(CONFIG_SYS_MDIO_BASE_ADDR + ((num) - 1) * (offset))
#define TSEC_GET_MDIO_REGS_BASE(num) \
TSEC_GET_MDIO_REGS((num), TSEC_MDIO_OFFSET)
#define DEFAULT_MII_NAME "FSL_MDIO" #define DEFAULT_MII_NAME "FSL_MDIO"
#define STD_TSEC_INFO(num) \ #define STD_TSEC_INFO(num) \
{ \ { \
.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \ .regs = TSEC_GET_REGS_BASE(num), \
.miiregs_sgmii = (struct tsec_mii_mng *)(CONFIG_SYS_MDIO_BASE_ADDR \ .miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num), \
+ (num - 1) * TSEC_MDIO_OFFSET), \
.devname = CONFIG_TSEC##num##_NAME, \ .devname = CONFIG_TSEC##num##_NAME, \
.phyaddr = TSEC##num##_PHY_ADDR, \ .phyaddr = TSEC##num##_PHY_ADDR, \
.flags = TSEC##num##_FLAGS, \ .flags = TSEC##num##_FLAGS, \
@@ -42,9 +55,8 @@
#define SET_STD_TSEC_INFO(x, num) \ #define SET_STD_TSEC_INFO(x, num) \
{ \ { \
x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \ x.regs = TSEC_GET_REGS_BASE(num); \
x.miiregs_sgmii = (struct tsec_mii_mng *)(CONFIG_SYS_MDIO_BASE_ADDR \ x.miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num); \
+ (num - 1) * TSEC_MDIO_OFFSET); \
x.devname = CONFIG_TSEC##num##_NAME; \ x.devname = CONFIG_TSEC##num##_NAME; \
x.phyaddr = TSEC##num##_PHY_ADDR; \ x.phyaddr = TSEC##num##_PHY_ADDR; \
x.flags = TSEC##num##_FLAGS;\ x.flags = TSEC##num##_FLAGS;\
@@ -281,8 +293,7 @@ typedef struct tsec_hash_regs
uint res2[24]; uint res2[24];
} tsec_hash_t; } tsec_hash_t;
typedef struct tsec struct tsec {
{
/* General Control and Status Registers (0x2_n000) */ /* General Control and Status Registers (0x2_n000) */
uint res000[4]; uint res000[4];
@@ -374,7 +385,7 @@ typedef struct tsec
/* TSEC Future Expansion Space (0x2_nc00-0x2_nffc) */ /* TSEC Future Expansion Space (0x2_nc00-0x2_nffc) */
uint resc00[256]; uint resc00[256];
} tsec_t; };
#define TSEC_GIGABIT (1 << 0) #define TSEC_GIGABIT (1 << 0)
@@ -383,8 +394,8 @@ typedef struct tsec
#define TSEC_SGMII (1 << 2) /* MAC-PHY interface uses SGMII */ #define TSEC_SGMII (1 << 2) /* MAC-PHY interface uses SGMII */
struct tsec_private { struct tsec_private {
tsec_t *regs; struct tsec __iomem *regs;
struct tsec_mii_mng *phyregs_sgmii; struct tsec_mii_mng __iomem *phyregs_sgmii;
struct phy_device *phydev; struct phy_device *phydev;
phy_interface_t interface; phy_interface_t interface;
struct mii_dev *bus; struct mii_dev *bus;
@@ -394,8 +405,8 @@ struct tsec_private {
}; };
struct tsec_info_struct { struct tsec_info_struct {
tsec_t *regs; struct tsec __iomem *regs;
struct tsec_mii_mng *miiregs_sgmii; struct tsec_mii_mng __iomem *miiregs_sgmii;
char *devname; char *devname;
char *mii_devname; char *mii_devname;
phy_interface_t interface; phy_interface_t interface;