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Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig
This converts the following to Kconfig: CONFIG_USB_XHCI_EXYNOS CONFIG_USB_EHCI_EXYNOS Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
@@ -32,6 +32,14 @@ config USB_XHCI_DWC3_OF_SIMPLE
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Support USB2/3 functionality in simple SoC integrations with
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Support USB2/3 functionality in simple SoC integrations with
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USB controller based on the DesignWare USB3 IP Core.
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USB controller based on the DesignWare USB3 IP Core.
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config USB_XHCI_EXYNOS
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bool "Support for Samsung Exynos5 family on-chip xHCI USB controller"
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depends on ARCH_EXYNOS5
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default y
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help
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Enables support for he on-chip xHCI controller on Samsung Exynos5
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SoCs.
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config USB_XHCI_MTK
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config USB_XHCI_MTK
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bool "Support for MediaTek on-chip xHCI USB controller"
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bool "Support for MediaTek on-chip xHCI USB controller"
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depends on ARCH_MEDIATEK
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depends on ARCH_MEDIATEK
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@@ -157,6 +165,14 @@ config USB_EHCI_ATMEL
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---help---
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---help---
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Enables support for the on-chip EHCI controller on Atmel chips.
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Enables support for the on-chip EHCI controller on Atmel chips.
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config USB_EHCI_EXYNOS
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bool "Support for Samsung Exynos EHCI USB controller"
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depends on ARCH_EXYNOS
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default y
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---help---
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Enables support for the on-chip EHCI controller on Samsung Exynos
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SoCs.
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config USB_EHCI_MARVELL
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config USB_EHCI_MARVELL
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bool "Support for Marvell on-chip EHCI USB controller"
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bool "Support for Marvell on-chip EHCI USB controller"
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depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
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depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
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@@ -11,11 +11,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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/* USB */
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#define CONFIG_USB_EHCI_EXYNOS
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#define CONFIG_USB_XHCI_EXYNOS
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/* DRAM Memory Banks */
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/* DRAM Memory Banks */
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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@@ -20,6 +20,4 @@
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#define CONFIG_LOWPOWER_FLAG 0x02020028
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#define CONFIG_LOWPOWER_FLAG 0x02020028
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#define CONFIG_LOWPOWER_ADDR 0x0202002C
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#define CONFIG_LOWPOWER_ADDR 0x0202002C
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#define CONFIG_USB_XHCI_EXYNOS
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#endif /* __CONFIG_EXYNOS5420_H */
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#endif /* __CONFIG_EXYNOS5420_H */
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@@ -144,11 +144,6 @@
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"kernel_addr_r=0x41000000\0" \
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"kernel_addr_r=0x41000000\0" \
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BOOTENV
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BOOTENV
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/* GPT */
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/* USB */
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#define CONFIG_USB_EHCI_EXYNOS
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/*
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/*
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* Supported Odroid boards: X3, U3
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* Supported Odroid boards: X3, U3
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* TODO: Add Odroid X support
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* TODO: Add Odroid X support
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@@ -16,9 +16,6 @@
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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/* USB */
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#define CONFIG_USB_EHCI_EXYNOS
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/* DFU */
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/* DFU */
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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#define DFU_MANIFEST_POLL_TIMEOUT 25000
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#define DFU_MANIFEST_POLL_TIMEOUT 25000
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@@ -16,9 +16,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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/* USB */
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#define CONFIG_USB_XHCI_EXYNOS
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/* DRAM Memory Banks */
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/* DRAM Memory Banks */
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#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
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#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
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