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Merge branch 'master' of git://git.denx.de/u-boot-nds32

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This commit is contained in:
Tom Rini
2013-07-25 08:22:08 -04:00
parent 0b17998e50 c54fd3efa4
commit aaf5e82560
25 changed files with 384 additions and 43 deletions
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1
include/common.h
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@@ -405,6 +405,7 @@ static inline int setenv_addr(const char *varname, const void *addr)
#endif
#ifdef CONFIG_NDS32
# include <asm/mach-types.h>
# include <asm/setup.h>
# include <asm/u-boot-nds32.h>
#endif /* CONFIG_NDS32 */
#ifdef CONFIG_MIPS

19
include/configs/adp-ag101.h
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@@ -20,6 +20,13 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
/*
* Definitions related to passing arguments to kernel.
*/
#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
#define CONFIG_INITRD_TAG /* send initrd params */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_MEM_REMAP
#endif
@@ -101,7 +108,9 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_FTSDC010
#define CONFIG_FTSDC010_NUMBER 1
#define CONFIG_FTSDC010_SDIO
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
/*
* Command line configuration.
@@ -220,6 +229,11 @@
#define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \
CONFIG_SYS_FTSDMC021_BANK0_BASE)
#define CONFIG_SYS_FTSDMC021_BANK1_BASE \
(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20))
#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \
CONFIG_SYS_FTSDMC021_BANK1_BASE)
#endif
/*
@@ -233,9 +247,12 @@
#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */
#endif
#define PHYS_SDRAM_1 \
(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0

18
include/configs/adp-ag101p.h
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@@ -20,6 +20,13 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
/*
* Definitions related to passing arguments to kernel.
*/
#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
#define CONFIG_INITRD_TAG /* send initrd params */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_MEM_REMAP
#endif
@@ -101,7 +108,9 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_FTSDC010
#define CONFIG_FTSDC010_NUMBER 1
#define CONFIG_FTSDC010_SDIO
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
/*
* Command line configuration.
@@ -221,6 +230,10 @@
#define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \
CONFIG_SYS_FTSDMC021_BANK0_BASE)
#define CONFIG_SYS_FTSDMC021_BANK1_BASE \
(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20))
#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \
CONFIG_SYS_FTSDMC021_BANK1_BASE)
#endif
/*
@@ -234,9 +247,12 @@
#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */
#endif
#define PHYS_SDRAM_1 \
(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0

84
include/faraday/ftpci100.h Normal file
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@@ -0,0 +1,84 @@
/*
* Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation
*
* Copyright (C) 2010 Andes Technology Corporation
* Gavin Guo, Andes Technology Corporation <gavinguo@andestech.com>
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __FTPCI100_H
#define __FTPCI100_H
/* AHB Control Registers */
struct ftpci100_ahbc {
unsigned int iosize; /* 0x00 - I/O Space Size Signal */
unsigned int prot; /* 0x04 - AHB Protection */
unsigned int rsved[8]; /* 0x08-0x24 - Reserved */
unsigned int conf; /* 0x28 - PCI Configuration */
unsigned int data; /* 0x2c - PCI Configuration DATA */
};
/*
* FTPCI100_IOSIZE_REG's constant definitions
*/
#define FTPCI100_BASE_IO_SIZE(x) (ffs(x) - 1) /* 1M - 2048M */
/*
* PCI Configuration Register
*/
#define PCI_INT_MASK 0x4c
#define PCI_MEM_BASE_SIZE1 0x50
#define PCI_MEM_BASE_SIZE2 0x54
#define PCI_MEM_BASE_SIZE3 0x58
/*
* PCI_INT_MASK's bit definitions
*/
#define PCI_INTA_ENABLE (1 << 22)
#define PCI_INTB_ENABLE (1 << 23)
#define PCI_INTC_ENABLE (1 << 24)
#define PCI_INTD_ENABLE (1 << 25)
/*
* PCI_MEM_BASE_SIZE1's constant definitions
*/
#define FTPCI100_BASE_ADR_SIZE(x) ((ffs(x) - 1) << 16) /* 1M - 2048M */
#define FTPCI100_MAX_FUNCTIONS 20
#define PCI_IRQ_LINES 4
#define MAX_BUS_NUM 256
#define MAX_DEV_NUM 32
#define MAX_FUN_NUM 8
#define PCI_MAX_BAR_PER_FUNC 6
/*
* PCI_MEM_SIZE
*/
#define FTPCI100_MEM_SIZE(x) (ffs(x) << 24)
/* This definition is used by pci_ftpci_init() */
#define FTPCI100_BRIDGE_VENDORID 0x159b
#define FTPCI100_BRIDGE_DEVICEID 0x4321
void pci_ftpci_init(void);
struct pcibar {
unsigned int size;
unsigned int addr;
};
struct pci_config {
unsigned int bus;
unsigned int dev; /* device */
unsigned int func;
unsigned int pin;
unsigned short v_id; /* vendor id */
unsigned short d_id; /* device id */
struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1];
};
#endif

2
include/ide.h
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@@ -60,7 +60,7 @@ int ide_device_present(int dev);
unsigned char ide_read_register(int dev, unsigned int port);
void ide_write_register(int dev, unsigned int port, unsigned char val);
void ide_read_data(int dev, ulong *sect_buf, int words);
void ide_write_data(int dev, ulong *sect_buf, int words);
void ide_write_data(int dev, const ulong *sect_buf, int words);
#endif
/*