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global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*

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The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini
2022-11-16 13:10:37 -05:00
parent aec118ebe6
commit aa6e94deab
589 changed files with 1197 additions and 1197 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
board/ti/am335x/board.c
View File

@@ -704,7 +704,7 @@ int board_init(void)
hw_watchdog_init();
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif

2
board/ti/am43xx/board.c
View File

@@ -639,7 +639,7 @@ int board_init(void)
u32 mreqprio_0, mreqprio_1, modena_init0_bw_fractional,
modena_init0_bw_integer, modena_init0_watermark_0;
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
/*

2
board/ti/am57xx/board.c
View File

@@ -661,7 +661,7 @@ bool am571x_idk_needs_lcd(void)
int board_init(void)
{
gpmc_init();
gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
gd->bd->bi_boot_params = (CFG_SYS_SDRAM_BASE + 0x100);
return 0;
}

4
board/ti/am65x/evm.c
View File

@@ -75,13 +75,13 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif

2
board/ti/dra7xx/evm.c
View File

@@ -644,7 +644,7 @@ int dram_init_banksize(void)
ram_size = board_ti_get_emif_size();
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = get_effective_memsize();
if (ram_size > CONFIG_MAX_MEM_MAPPED) {
gd->bd->bi_dram[1].start = 0x200000000;

4
board/ti/j721e/evm.c
View File

@@ -71,13 +71,13 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif

4
board/ti/j721s2/evm.c
View File

@@ -60,13 +60,13 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x7fffffff;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x37fffffff;
gd->ram_size = 0x400000000;
#endif

12
board/ti/ks2_evm/board.c
View File

@@ -46,7 +46,7 @@ int dram_init(void)
ddr3_size = ddr3_init();
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
#if defined(CONFIG_TI_AEMIF)
if (!(board_is_k2g_ice() || board_is_k2g_i1()))
@@ -71,7 +71,7 @@ struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
return 0;
}
@@ -120,7 +120,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
/* adjust memory start address for LPAE */
if (lpae) {
start[0] -= CONFIG_SYS_SDRAM_BASE;
start[0] -= CFG_SYS_SDRAM_BASE;
start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
}
@@ -174,11 +174,11 @@ void ft_board_setup_ex(void *blob, struct bd_info *bd)
"linux,initrd-end", NULL);
if (prop1 && prop2) {
initrd_start = __be64_to_cpu(*prop1);
initrd_start -= CONFIG_SYS_SDRAM_BASE;
initrd_start -= CFG_SYS_SDRAM_BASE;
initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
initrd_start = __cpu_to_be64(initrd_start);
initrd_end = __be64_to_cpu(*prop2);
initrd_end -= CONFIG_SYS_SDRAM_BASE;
initrd_end -= CFG_SYS_SDRAM_BASE;
initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
initrd_end = __cpu_to_be64(initrd_end);
@@ -221,7 +221,7 @@ void ft_board_setup_ex(void *blob, struct bd_info *bd)
*reserve_start = __cpu_to_be64(*reserve_start);
size = __cpu_to_be64(*(reserve_start + 1));
if (size) {
*reserve_start -= CONFIG_SYS_SDRAM_BASE;
*reserve_start -= CFG_SYS_SDRAM_BASE;
*reserve_start +=
CONFIG_SYS_LPAE_SDRAM_BASE;
*reserve_start =

2
board/ti/ti816x/evm.c
View File

@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif