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mirror of https://xff.cz/git/u-boot/ synced 2025-09-27 21:41:16 +02:00
- rockchip RK3399 HDMI output fix
This commit is contained in:
Tom Rini
2020-04-02 12:15:17 -04:00
14 changed files with 70 additions and 2 deletions

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@@ -85,6 +85,16 @@ enum {
LB_RGB_1280X8 = 0x5 LB_RGB_1280X8 = 0x5
}; };
#if defined(CONFIG_ROCKCHIP_RK3399)
enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_MIPI,
VOP_MODE_HDMI,
VOP_MODE_MIPI1,
VOP_MODE_DP,
VOP_MODE_NONE,
};
#else
enum vop_modes { enum vop_modes {
VOP_MODE_EDP = 0, VOP_MODE_EDP = 0,
VOP_MODE_HDMI, VOP_MODE_HDMI,
@@ -94,6 +104,7 @@ enum vop_modes {
VOP_MODE_AUTO_DETECT, VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN, VOP_MODE_UNKNOWN,
}; };
#endif
/* VOP_VERSION_INFO */ /* VOP_VERSION_INFO */
#define M_FPGA_VERSION (0xffff << 16) #define M_FPGA_VERSION (0xffff << 16)

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@@ -229,6 +229,7 @@ config ROCKCHIP_RK3399
select DM_PMIC select DM_PMIC
select DM_REGULATOR_FIXED select DM_REGULATOR_FIXED
select BOARD_LATE_INIT select BOARD_LATE_INIT
imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_SDRAM_COMMON imply ROCKCHIP_SDRAM_COMMON
imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD

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@@ -568,6 +568,7 @@ config PRE_CON_BUF_ADDR
default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I
default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I
default 0x0f000000 if ROCKCHIP_RK3288 default 0x0f000000 if ROCKCHIP_RK3288
default 0x0f200000 if ROCKCHIP_RK3399
help help
This sets the start address of the pre-console buffer. This must This sets the start address of the pre-console buffer. This must
be in available memory and is accessed before relocation and be in available memory and is accessed before relocation and

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@@ -52,5 +52,12 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y

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@@ -52,5 +52,12 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y

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@@ -52,5 +52,12 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y

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@@ -59,3 +59,9 @@ CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y

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@@ -58,5 +58,12 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y

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@@ -994,6 +994,13 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
case DCLK_VOP1: case DCLK_VOP1:
ret = rk3399_vop_set_clk(priv->cru, clk->id, rate); ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
break; break;
case ACLK_VOP1:
case HCLK_VOP1:
/**
* assigned-clocks handling won't require for vopl, so
* return 0 to satisfy clk_set_defaults during device probe.
*/
return 0;
case SCLK_DDRCLK: case SCLK_DDRCLK:
ret = rk3399_ddr_set_clk(priv->cru, rate); ret = rk3399_ddr_set_clk(priv->cru, rate);
break; break;

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@@ -22,6 +22,7 @@ menuconfig VIDEO_ROCKCHIP
config VIDEO_ROCKCHIP_MAX_XRES config VIDEO_ROCKCHIP_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)" int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_ROCKCHIP depends on VIDEO_ROCKCHIP
default 3480 if ROCKCHIP_RK3399 && DISPLAY_ROCKCHIP_HDMI
default 1920 default 1920
help help
The maximum horizontal resolution to support for the framebuffer. The maximum horizontal resolution to support for the framebuffer.
@@ -31,6 +32,7 @@ config VIDEO_ROCKCHIP_MAX_XRES
config VIDEO_ROCKCHIP_MAX_YRES config VIDEO_ROCKCHIP_MAX_YRES
int "Maximum vertical resolution (for memory allocation purposes)" int "Maximum vertical resolution (for memory allocation purposes)"
depends on VIDEO_ROCKCHIP depends on VIDEO_ROCKCHIP
default 2160 if ROCKCHIP_RK3399 && DISPLAY_ROCKCHIP_HDMI
default 1080 default 1080
help help
The maximum vertical resolution to support for the framebuffer. The maximum vertical resolution to support for the framebuffer.

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@@ -45,8 +45,6 @@ static void rk3399_set_pin_polarity(struct udevice *dev,
V_RK3399_DSP_MIPI_POL(polarity)); V_RK3399_DSP_MIPI_POL(polarity));
break; break;
case VOP_MODE_LVDS:
/* The RK3399 has neither parallel RGB nor LVDS output. */
default: default:
debug("%s: unsupported output mode %x\n", __func__, mode); debug("%s: unsupported output mode %x\n", __func__, mode);
} }

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@@ -118,10 +118,12 @@ static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode)
V_EDP_OUT_EN(1)); V_EDP_OUT_EN(1));
break; break;
#if defined(CONFIG_ROCKCHIP_RK3288)
case VOP_MODE_LVDS: case VOP_MODE_LVDS:
clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN, clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
V_RGB_OUT_EN(1)); V_RGB_OUT_EN(1));
break; break;
#endif
case VOP_MODE_MIPI: case VOP_MODE_MIPI:
clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN, clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
@@ -313,7 +315,9 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node)
/* Set bitwidth for vop display according to vop mode */ /* Set bitwidth for vop display according to vop mode */
switch (vop_id) { switch (vop_id) {
case VOP_MODE_EDP: case VOP_MODE_EDP:
#if defined(CONFIG_ROCKCHIP_RK3288)
case VOP_MODE_LVDS: case VOP_MODE_LVDS:
#endif
l2bpp = VIDEO_BPP16; l2bpp = VIDEO_BPP16;
break; break;
case VOP_MODE_HDMI: case VOP_MODE_HDMI:

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@@ -6,6 +6,11 @@
#ifndef __EVB_RK3399_H #ifndef __EVB_RK3399_H
#define __EVB_RK3399_H #define __EVB_RK3399_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#include <configs/rk3399_common.h> #include <configs/rk3399_common.h>
#if defined(CONFIG_ENV_IS_IN_MMC) #if defined(CONFIG_ENV_IS_IN_MMC)

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@@ -6,6 +6,11 @@
#ifndef __ROCK960_RK3399_H #ifndef __ROCK960_RK3399_H
#define __ROCK960_RK3399_H #define __ROCK960_RK3399_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#include <configs/rk3399_common.h> #include <configs/rk3399_common.h>
#define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_SYS_MMC_ENV_DEV 1