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net: mdio: Handle bus level GPIO Reset

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Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
This commit is contained in:
Roger Quadros
2024-02-28 12:35:26 +02:00
committed by Tom Rini
parent 9e434756ad
commit a0e02c6619
2 changed files with 43 additions and 1 deletions
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7
include/phy.h
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@@ -9,6 +9,7 @@
#ifndef _PHY_H
#define _PHY_H
#include <asm-generic/gpio.h>
#include <log.h>
#include <phy_interface.h>
#include <dm/ofnode.h>
@@ -76,6 +77,12 @@ struct mii_dev {
int (*reset)(struct mii_dev *bus);
struct phy_device *phymap[PHY_MAX_ADDR];
u32 phy_mask;
/** @reset_delay_us: Bus GPIO reset pulse width in microseconds */
int reset_delay_us;
/** @reset_post_delay_us: Bus GPIO reset deassert delay in microseconds */
int reset_post_delay_us;
/** @reset_gpiod: Bus Reset GPIO descriptor pointer */
struct gpio_desc reset_gpiod;
};
/* struct phy_driver: a structure which defines PHY behavior