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arm: mvebu: theadorable: Configure board for PCIe 2.0 capability

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Use a board-specific board_sat_r_get() function to configure the board
for PCIe 2.0 capability (e.g. 5GB/s link speed). Otherwise the default
of 2.5GB/s will be established.

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese
2016-08-25 16:22:10 +02:00
parent 8824cfc19a
commit 9ed00b072b
1 changed files with 6 additions and 0 deletions
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6
board/theadorable/theadorable.c
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@@ -126,6 +126,12 @@ MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode)
return &theadorable_serdes_cfg[0]; return &theadorable_serdes_cfg[0];
} }
u8 board_sat_r_get(u8 dev_num, u8 reg)
{
/* Bit 0 enables PCI 2.0 link capabilities instead of PCI 1.x */
return 0x01;
}
int board_early_init_f(void) int board_early_init_f(void)
{ {
/* Configure MPP */ /* Configure MPP */