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Driver/DDR: Add Freescale DDR driver for ARM
Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM. Signed-off-by: York Sun <yorksun@freescale.com>
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@@ -15,16 +15,18 @@
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#include <common.h>
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#include <i2c.h>
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#include <fsl_ddr_sdram.h>
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#include <asm/fsl_law.h>
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#include <fsl_ddr.h>
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#ifdef CONFIG_PPC
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#include <asm/fsl_law.h>
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void fsl_ddr_set_lawbar(
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const common_timing_params_t *memctl_common_params,
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unsigned int memctl_interleaved,
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unsigned int ctrl_num);
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void fsl_ddr_set_intl3r(const unsigned int granule_size);
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#endif
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void fsl_ddr_set_intl3r(const unsigned int granule_size);
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#if defined(SPD_EEPROM_ADDRESS) || \
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defined(SPD_EEPROM_ADDRESS1) || defined(SPD_EEPROM_ADDRESS2) || \
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defined(SPD_EEPROM_ADDRESS3) || defined(SPD_EEPROM_ADDRESS4)
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@@ -549,7 +551,9 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
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phys_size_t fsl_ddr_sdram(void)
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{
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unsigned int i;
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#ifdef CONFIG_PPC
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unsigned int law_memctl = LAW_TRGT_IF_DDR_1;
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#endif
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unsigned long long total_memory;
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fsl_ddr_info_t info;
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int deassert_reset;
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@@ -621,6 +625,7 @@ phys_size_t fsl_ddr_sdram(void)
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}
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}
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#ifdef CONFIG_PPC
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/* program LAWs */
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for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
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if (info.memctl_opts[i].memctl_interleaving) {
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@@ -681,6 +686,7 @@ phys_size_t fsl_ddr_sdram(void)
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law_memctl, i);
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}
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}
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#endif
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debug("total_memory by %s = %llu\n", __func__, total_memory);
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