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mirror of https://xff.cz/git/u-boot/ synced 2025-09-01 00:32:04 +02:00
----------------------------------------------------------------
Fixes for 2020.10
-----------------

- Toradex boards
- mx6qsabrelite: fix env offset
- esdhc_imx: waiting for clock instead of sleep
- dyn RAM calibration for entry point i.MX6

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/728274602
This commit is contained in:
Tom Rini
2020-09-18 10:42:12 -04:00
33 changed files with 67 additions and 74 deletions

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@@ -12,8 +12,8 @@
#include "fsl-imx8qm-apalis-u-boot.dtsi" #include "fsl-imx8qm-apalis-u-boot.dtsi"
/ { / {
model = "Toradex Apalis iMX8QM"; model = "Toradex Apalis iMX8";
compatible = "toradex,apalis-imx8qm", "fsl,imx8qm"; compatible = "toradex,apalis-imx8", "fsl,imx8qm";
chosen { chosen {
bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200"; bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200";
@@ -38,7 +38,7 @@
<&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
<&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>; <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>;
apalis-imx8qm { apalis-imx8 {
pinctrl_gpio12: gpio12grp { pinctrl_gpio12: gpio12grp {
fsl,pins = < fsl,pins = <
/* Apalis GPIO1 */ /* Apalis GPIO1 */

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@@ -9,8 +9,8 @@
#include "fsl-imx8qxp-colibri-u-boot.dtsi" #include "fsl-imx8qxp-colibri-u-boot.dtsi"
/ { / {
model = "Toradex Colibri iMX8QXP"; model = "Toradex Colibri iMX8X";
compatible = "toradex,colibri-imx8qxp", "fsl,imx8qxp"; compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
chosen { chosen {
bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200"; bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200";
@@ -32,7 +32,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>; pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>;
colibri-imx8qxp { colibri-imx8x {
pinctrl_lpuart0: lpuart0grp { pinctrl_lpuart0: lpuart0grp {
fsl,pins = < fsl,pins = <
SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 SC_P_UART0_RX_ADMA_UART0_RX 0x06000020

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@@ -41,9 +41,7 @@
#define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */ #define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */
#define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */ #define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */
#define MXC_CPU_IMX8MP 0x182/* dummy ID */ #define MXC_CPU_IMX8MP 0x182/* dummy ID */
#define MXC_CPU_IMX8MP7 0x183 /* dummy ID */
#define MXC_CPU_IMX8MP6 0x184 /* dummy ID */ #define MXC_CPU_IMX8MP6 0x184 /* dummy ID */
#define MXC_CPU_IMX8MP5 0x185 /* dummy ID */
#define MXC_CPU_IMX8MPL 0x186 /* dummy ID */ #define MXC_CPU_IMX8MPL 0x186 /* dummy ID */
#define MXC_CPU_IMX8MPD 0x187 /* dummy ID */ #define MXC_CPU_IMX8MPD 0x187 /* dummy ID */
#define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */

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@@ -316,7 +316,7 @@ enum clk_src_index {
#define FRAC_PLL_LOCK_MASK BIT(31) #define FRAC_PLL_LOCK_MASK BIT(31)
#define FRAC_PLL_CLKE_MASK BIT(21) #define FRAC_PLL_CLKE_MASK BIT(21)
#define FRAC_PLL_PD_MASK BIT(19) #define FRAC_PLL_PD_MASK BIT(19)
#define FRAC_PLL_REFCLK_SEL_MASK BIT(16) #define FRAC_PLL_REFCLK_SEL_MASK (0x3 << 16)
#define FRAC_PLL_LOCK_SEL_MASK BIT(15) #define FRAC_PLL_LOCK_SEL_MASK BIT(15)
#define FRAC_PLL_BYPASS_MASK BIT(14) #define FRAC_PLL_BYPASS_MASK BIT(14)
#define FRAC_PLL_COUNTCLK_SEL_MASK BIT(13) #define FRAC_PLL_COUNTCLK_SEL_MASK BIT(13)
@@ -358,10 +358,10 @@ enum clk_src_index {
#define SSCG_PLL_LOCK_SEL_MASK BIT(3) #define SSCG_PLL_LOCK_SEL_MASK BIT(3)
#define SSCG_PLL_COUNTCLK_SEL_MASK BIT(2) #define SSCG_PLL_COUNTCLK_SEL_MASK BIT(2)
#define SSCG_PLL_REFCLK_SEL_MASK 0x3 #define SSCG_PLL_REFCLK_SEL_MASK 0x3
#define SSCG_PLL_REFCLK_SEL_OSC_25M (0 << 16) #define SSCG_PLL_REFCLK_SEL_OSC_25M (0)
#define SSCG_PLL_REFCLK_SEL_OSC_27M BIT(16) #define SSCG_PLL_REFCLK_SEL_OSC_27M (1)
#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) #define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2)
#define SSCG_PLL_REFCLK_SEL_CLK_PN (3 << 16) #define SSCG_PLL_REFCLK_SEL_CLK_PN (3)
#define SSCG_PLL_SSDS_MASK BIT(8) #define SSCG_PLL_SSDS_MASK BIT(8)
#define SSCG_PLL_SSMD_MASK (0x7 << 5) #define SSCG_PLL_SSMD_MASK (0x7 << 5)

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@@ -57,7 +57,7 @@ struct mxc_ccm_reg {
uint32_t reserved_0[4092]; uint32_t reserved_0[4092];
struct mxc_ccm_ccgr ccgr_array[191]; /* offset 0x4000 */ struct mxc_ccm_ccgr ccgr_array[191]; /* offset 0x4000 */
uint32_t reserved_1[3332]; uint32_t reserved_1[3332];
struct mxc_ccm_root_slice root[121]; /* offset 0x8000 */ struct mxc_ccm_root_slice root[125]; /* offset 0x8000 */
}; };

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@@ -67,13 +67,10 @@ struct bd_info;
#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL)) #define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL)) #define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
#define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \ #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \
is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP7) || \ is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6))
is_cpu_type(MXC_CPU_IMX8MP6) || is_cpu_type(MXC_CPU_IMX8MP5))
#define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD)) #define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD))
#define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL)) #define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL))
#define is_imx8mp7() (is_cpu_type(MXC_CPU_IMX8MP7))
#define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6)) #define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6))
#define is_imx8mp5() (is_cpu_type(MXC_CPU_IMX8MP5))
#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))

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@@ -102,12 +102,8 @@ const char *get_imx_type(u32 imxtype)
return "8MP Dual[3]"; /* Dual-core version of the imx8mp */ return "8MP Dual[3]"; /* Dual-core version of the imx8mp */
case MXC_CPU_IMX8MPL: case MXC_CPU_IMX8MPL:
return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */ return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */
case MXC_CPU_IMX8MP7:
return "8MP[7]"; /* Quad-core version of the imx8mp, VPU fused */
case MXC_CPU_IMX8MP6: case MXC_CPU_IMX8MP6:
return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */ return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */
case MXC_CPU_IMX8MP5:
return "8MP[5]"; /* Quad-core version of the imx8mp, ISP fused */
case MXC_CPU_IMX8MN: case MXC_CPU_IMX8MN:
return "8MNano Quad"; /* Quad-core version */ return "8MNano Quad"; /* Quad-core version */
case MXC_CPU_IMX8MND: case MXC_CPU_IMX8MND:

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@@ -360,6 +360,7 @@ void init_clk_ecspi(u32 index)
clock_enable(CCGR_ECSPI2, 0); clock_enable(CCGR_ECSPI2, 0);
clock_set_target_val(ECSPI2_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0)); clock_set_target_val(ECSPI2_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));
clock_enable(CCGR_ECSPI2, 1); clock_enable(CCGR_ECSPI2, 1);
return;
case 2: case 2:
clock_enable(CCGR_ECSPI3, 0); clock_enable(CCGR_ECSPI3, 0);
clock_set_target_val(ECSPI3_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0)); clock_set_target_val(ECSPI3_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));

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@@ -343,12 +343,8 @@ static u32 get_cpu_variant_type(u32 type)
switch (flag) { switch (flag) {
case 7: case 7:
return MXC_CPU_IMX8MPL; return MXC_CPU_IMX8MPL;
case 6:
return MXC_CPU_IMX8MP5;
case 2: case 2:
return MXC_CPU_IMX8MP6; return MXC_CPU_IMX8MP6;
case 1:
return MXC_CPU_IMX8MP7;
default: default:
break; break;
} }
@@ -889,16 +885,16 @@ usb_modify_speed:
disable_cpu_nodes(blob, 3); disable_cpu_nodes(blob, 3);
#elif defined(CONFIG_IMX8MP) #elif defined(CONFIG_IMX8MP)
if (is_imx8mpl() || is_imx8mp7()) if (is_imx8mpl())
disable_vpu_nodes(blob); disable_vpu_nodes(blob);
if (is_imx8mpl() || is_imx8mp6() || is_imx8mp5()) if (is_imx8mpl() || is_imx8mp6())
disable_npu_nodes(blob); disable_npu_nodes(blob);
if (is_imx8mpl() || is_imx8mp5()) if (is_imx8mpl())
disable_isp_nodes(blob); disable_isp_nodes(blob);
if (is_imx8mpl() || is_imx8mp7() || is_imx8mp6() || is_imx8mp5()) if (is_imx8mpl() || is_imx8mp6())
disable_dsp_nodes(blob); disable_dsp_nodes(blob);
if (is_imx8mpd()) if (is_imx8mpd())

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@@ -250,16 +250,31 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
static void mmdc_set_sdqs(bool set) static void mmdc_set_sdqs(bool set)
{ {
struct mx6sdl_iomux_ddr_regs *mx6sdl_ddr_iomux =
(struct mx6sdl_iomux_ddr_regs *)MX6SDL_IOM_DDR_BASE;
struct mx6dq_iomux_ddr_regs *mx6dq_ddr_iomux = struct mx6dq_iomux_ddr_regs *mx6dq_ddr_iomux =
(struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE; (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
struct mx6sx_iomux_ddr_regs *mx6sx_ddr_iomux = struct mx6sx_iomux_ddr_regs *mx6sx_ddr_iomux =
(struct mx6sx_iomux_ddr_regs *)MX6SX_IOM_DDR_BASE; (struct mx6sx_iomux_ddr_regs *)MX6SX_IOM_DDR_BASE;
struct mx6sl_iomux_ddr_regs *mx6sl_ddr_iomux =
(struct mx6sl_iomux_ddr_regs *)MX6SL_IOM_DDR_BASE;
struct mx6ul_iomux_ddr_regs *mx6ul_ddr_iomux =
(struct mx6ul_iomux_ddr_regs *)MX6UL_IOM_DDR_BASE;
int i, sdqs_cnt; int i, sdqs_cnt;
u32 sdqs; u32 sdqs;
if (is_mx6sx()) { if (is_mx6sx()) {
sdqs = (u32)(&mx6sx_ddr_iomux->dram_sdqs0); sdqs = (u32)(&mx6sx_ddr_iomux->dram_sdqs0);
sdqs_cnt = 2; sdqs_cnt = 2;
} else if (is_mx6sl()) {
sdqs = (u32)(&mx6sl_ddr_iomux->dram_sdqs0);
sdqs_cnt = 2;
} else if (is_mx6ul() || is_mx6ull()) {
sdqs = (u32)(&mx6ul_ddr_iomux->dram_sdqs0);
sdqs_cnt = 2;
} else if (is_mx6sdl()) {
sdqs = (u32)(&mx6sdl_ddr_iomux->dram_sdqs0);
sdqs_cnt = 8;
} else { /* MX6DQ */ } else { /* MX6DQ */
sdqs = (u32)(&mx6dq_ddr_iomux->dram_sdqs0); sdqs = (u32)(&mx6dq_ddr_iomux->dram_sdqs0);
sdqs_cnt = 8; sdqs_cnt = 8;

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@@ -5,6 +5,6 @@ S: Maintained
F: arch/arm/dts/fsl-imx8-apalis.dts F: arch/arm/dts/fsl-imx8-apalis.dts
F: arch/arm/dts/fsl-imx8-apalis-u-boot.dtsi F: arch/arm/dts/fsl-imx8-apalis-u-boot.dtsi
F: board/toradex/apalis-imx8/ F: board/toradex/apalis-imx8/
F: configs/apalis-imx8qm_defconfig F: configs/apalis-imx8_defconfig
F: doc/board/toradex/apalix-imx8.rst F: doc/board/toradex/apalix-imx8.rst
F: include/configs/apalis-imx8.h F: include/configs/apalis-imx8.h

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@@ -173,8 +173,6 @@ int board_late_init(void)
#if defined(CONFIG_DM_VIDEO) #if defined(CONFIG_DM_VIDEO)
setup_lcd(); setup_lcd();
show_boot_logo();
#endif #endif
return 0; return 0;

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@@ -5,6 +5,6 @@ S: Maintained
F: arch/arm/dts/fsl-imx8x-colibri.dts F: arch/arm/dts/fsl-imx8x-colibri.dts
F: arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi F: arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi
F: board/toradex/colibri-imx8x/ F: board/toradex/colibri-imx8x/
F: configs/colibri-imx8qxp_defconfig F: configs/colibri-imx8x_defconfig
F: doc/board/toradex/colibri-imx8x.rst F: doc/board/toradex/colibri-imx8x.rst
F: include/configs/colibri-imx8x.h F: include/configs/colibri-imx8x.h

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@@ -133,8 +133,10 @@ static int setup_lcd(void)
*/ */
void board_preboot_os(void) void board_preboot_os(void)
{ {
#ifdef CONFIG_DM_VIDEO
gpio_direction_output(GPIO_PWM_A, 1); gpio_direction_output(GPIO_PWM_A, 1);
gpio_direction_output(GPIO_BL_ON, 0); gpio_direction_output(GPIO_BL_ON, 0);
#endif
} }
static void setup_iomux_uart(void) static void setup_iomux_uart(void)
@@ -356,8 +358,6 @@ int board_late_init(void)
{ {
#if defined(CONFIG_DM_VIDEO) #if defined(CONFIG_DM_VIDEO)
setup_lcd(); setup_lcd();
show_boot_logo();
#endif #endif
return 0; return 0;
} }

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@@ -203,22 +203,3 @@ int ft_common_board_setup(void *blob, struct bd_info *bd)
} }
#endif /* CONFIG_TDX_CFG_BLOCK */ #endif /* CONFIG_TDX_CFG_BLOCK */
#if defined(CONFIG_DM_VIDEO)
int show_boot_logo(void)
{
struct udevice *dev;
int ret;
int xpos, ypos;
splash_get_pos(&xpos, &ypos);
ret = uclass_get_device(UCLASS_VIDEO, 0, &dev);
if (ret)
return ret;
ret = video_bmp_display(dev, (ulong)bmp_logo_bitmap, xpos, ypos, true);
return ret;
}
#endif /* CONFIG_DM_VIDEO */

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@@ -11,7 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis"
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8-imximage.cfg"
CONFIG_LOG=y CONFIG_LOG=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set

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@@ -14,6 +14,8 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx6ull/imximage.cfg,
CONFIG_BOOTDELAY=1 CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set

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@@ -10,7 +10,7 @@ CONFIG_TARGET_COLIBRI_IMX8X=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri"
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg"
CONFIG_LOG=y CONFIG_LOG=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set

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@@ -12,6 +12,8 @@ CONFIG_IMX_HAB=y
CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand" CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand"
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb "
CONFIG_BOOTDELAY=1 CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

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@@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc"
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb"
CONFIG_BOOTDELAY=1 CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_CONSOLE_MUX is not set # CONFIG_CONSOLE_MUX is not set

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@@ -11,6 +11,8 @@ CONFIG_TARGET_COLIBRI_VF=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb"
CONFIG_BOOTDELAY=1 CONFIG_BOOTDELAY=1
CONFIG_LOGLEVEL=3 CONFIG_LOGLEVEL=3
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y

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@@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x60000 CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6Q=y CONFIG_MX6Q=y
CONFIG_TARGET_NITROGEN6X=y CONFIG_TARGET_NITROGEN6X=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y

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@@ -11,7 +11,6 @@ CONFIG_PRE_CON_BUF_ADDR=0x7c000000
CONFIG_CMD_HDMIDETECT=y CONFIG_CMD_HDMIDETECT=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910"
CONFIG_AHCI=y CONFIG_AHCI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc rescan; if run bootcmd_up1; then run bootcmd_up2; else run bootcmd_mmc || run distro_bootcmd; fi" CONFIG_BOOTCOMMAND="mmc rescan; if run bootcmd_up1; then run bootcmd_up2; else run bootcmd_mmc || run distro_bootcmd; fi"

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@@ -51,7 +51,7 @@ Build U-Boot
------------ ------------
.. code-block:: bash .. code-block:: bash
$ make apalis-imx8qm_defconfig $ make apalis-imx8_defconfig
$ make u-boot-dtb.imx $ make u-boot-dtb.imx
Load the U-Boot Binary Using UUU Load the U-Boot Binary Using UUU

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@@ -52,7 +52,7 @@ Build U-Boot
.. code-block:: bash .. code-block:: bash
$ make colibri-imx8qxp_defconfig $ make colibri-imx8x_defconfig
$ make u-boot-dtb.imx $ make u-boot-dtb.imx
Load the U-Boot Binary Using UUU Load the U-Boot Binary Using UUU

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@@ -36,6 +36,7 @@
#include <dt-structs.h> #include <dt-structs.h>
#include <mapmem.h> #include <mapmem.h>
#include <dm/ofnode.h> #include <dm/ofnode.h>
#include <linux/iopoll.h>
#if !CONFIG_IS_ENABLED(BLK) #if !CONFIG_IS_ENABLED(BLK)
#include "mmc_private.h" #include "mmc_private.h"
@@ -631,6 +632,8 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
{ {
struct fsl_esdhc *regs = priv->esdhc_regs; struct fsl_esdhc *regs = priv->esdhc_regs;
int div = 1; int div = 1;
u32 tmp;
int ret;
#ifdef ARCH_MXC #ifdef ARCH_MXC
#ifdef CONFIG_MX53 #ifdef CONFIG_MX53
/* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
@@ -664,7 +667,9 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk); esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000); ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp, tmp & PRSSTAT_SDSTB, 100);
if (ret)
pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n");
#ifdef CONFIG_FSL_USDHC #ifdef CONFIG_FSL_USDHC
esdhc_setbits32(&regs->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); esdhc_setbits32(&regs->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN);

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@@ -135,7 +135,7 @@
#endif #endif
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \ BOOTENV \
"bootcmd=setenv fdtfile ${fdt_file}; run distro_bootcmd ; " \ "bootcmd=run distro_bootcmd ; " \
"usb start ; " \ "usb start ; " \
"setenv stdout serial,vidconsole; " \ "setenv stdout serial,vidconsole; " \
"setenv stdin serial,usbkbd\0" \ "setenv stdin serial,usbkbd\0" \
@@ -143,6 +143,7 @@
"console=ttymxc0\0" \ "console=ttymxc0\0" \
"defargs=enable_wait_mode=off vmalloc=400M\0" \ "defargs=enable_wait_mode=off vmalloc=400M\0" \
"fdt_file=" FDT_FILE "\0" \ "fdt_file=" FDT_FILE "\0" \
"fdtfile=" FDT_FILE "\0" \
"fdt_fixup=;\0" \ "fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
NFS_BOOTCMD \ NFS_BOOTCMD \

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@@ -35,8 +35,6 @@
#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1 #define CONFIG_SERVERIP 192.168.10.1
#define FDT_FILE "imx6ull-colibri${variant}-${fdt_board}.dtb"
#define MEM_LAYOUT_ENV_SETTINGS \ #define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \ "bootm_size=0x10000000\0" \
"fdt_addr_r=0x82100000\0" \ "fdt_addr_r=0x82100000\0" \
@@ -57,7 +55,7 @@
"setenv bootargs ${defargs} ${nfsargs} " \ "setenv bootargs ${defargs} ${nfsargs} " \
"${setupargs} ${vidargs}; echo Booting from NFS...;" \ "${setupargs} ${vidargs}; echo Booting from NFS...;" \
"dhcp ${kernel_addr_r} && " \ "dhcp ${kernel_addr_r} && " \
"tftp ${fdt_addr_r} " FDT_FILE " && " \ "tftp ${fdt_addr_r} ${fdtfile} && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define UBI_BOOTCMD \ #define UBI_BOOTCMD \
@@ -71,8 +69,8 @@
"ubi read ${fdt_addr_r} dtb && " \ "ubi read ${fdt_addr_r} dtb && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define CONFIG_BOOTCOMMAND "run ubiboot; " \ /* Run Distro Boot script if ubiboot fails */
"setenv fdtfile " FDT_FILE " && run distro_bootcmd;" #define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
#define BOOT_TARGET_DEVICES(func) \ #define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \ func(MMC, mmc, 0) \
@@ -111,6 +109,7 @@
"fatload ${interface} 0:1 ${loadaddr} " \ "fatload ${interface} 0:1 ${loadaddr} " \
"${board}/flash_blk.img && source ${loadaddr}\0" \ "${board}/flash_blk.img && source ${loadaddr}\0" \
"splashpos=m,m\0" \ "splashpos=m,m\0" \
"splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
"vidargs=video=mxsfb:640x480M-16@60" "vidargs=video=mxsfb:640x480M-16@60"

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@@ -118,7 +118,7 @@
#define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define FDT_FILE "imx6dl-colibri-eval-v3.dtb"
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \ BOOTENV \
"bootcmd=setenv fdtfile ${fdt_file}; run distro_bootcmd; " \ "bootcmd=run distro_bootcmd; " \
"usb start ; " \ "usb start ; " \
"setenv stdout serial,vidconsole; " \ "setenv stdout serial,vidconsole; " \
"setenv stdin serial,usbkbd\0" \ "setenv stdin serial,usbkbd\0" \
@@ -126,6 +126,7 @@
"console=ttymxc0\0" \ "console=ttymxc0\0" \
"defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \
"fdt_file=" FDT_FILE "\0" \ "fdt_file=" FDT_FILE "\0" \
"fdtfile=" FDT_FILE "\0" \
"fdt_fixup=;\0" \ "fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
NFS_BOOTCMD \ NFS_BOOTCMD \

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@@ -118,13 +118,11 @@
#if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND)
#define CONFIG_BOOTCOMMAND "run ubiboot ; echo ; echo ubiboot failed ; " \ #define CONFIG_BOOTCOMMAND "run ubiboot ; echo ; echo ubiboot failed ; " \
"setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;" "run distro_bootcmd;"
#define MODULE_EXTRA_ENV_SETTINGS \ #define MODULE_EXTRA_ENV_SETTINGS \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
UBI_BOOTCMD UBI_BOOTCMD
#elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) #elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC)
#define CONFIG_BOOTCOMMAND \
"setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb && run distro_bootcmd;"
#define MODULE_EXTRA_ENV_SETTINGS \ #define MODULE_EXTRA_ENV_SETTINGS \
"variant=-emmc\0" \ "variant=-emmc\0" \
EMMC_ANDROID_BOOTCMD EMMC_ANDROID_BOOTCMD
@@ -173,6 +171,7 @@
"fatload ${interface} 0:1 ${loadaddr} " \ "fatload ${interface} 0:1 ${loadaddr} " \
"${board}/flash_blk.img && source ${loadaddr}\0" \ "${board}/flash_blk.img && source ${loadaddr}\0" \
"splashpos=m,m\0" \ "splashpos=m,m\0" \
"splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
"updlevel=2\0" "updlevel=2\0"

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@@ -76,8 +76,7 @@
"ubi read ${fdt_addr_r} dtb && " \ "ubi read ${fdt_addr_r} dtb && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define CONFIG_BOOTCOMMAND "run ubiboot; " \ #define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
"setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;"
#define BOOT_TARGET_DEVICES(func) \ #define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \ func(MMC, mmc, 0) \