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EXYNOS: display 32bpp bitmap TIZEN logo
This patch supports drawing 32bpp bitmap TIZEN logo in exynos fb. "tizen_hd_logo.h" data is compressed from trats_logo.bmp to trats_logo.bmp.gz by gzip and converted to tizen_hd_logo.h header file format by some application. The logo data is decompressed in the exynos fb driver by bmp_display(). Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
This commit is contained in:
committed by
Anatolij Gustschin
parent
5a4c59be89
commit
90464971f9
@@ -37,6 +37,7 @@
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#include <pmic.h>
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#include <pmic.h>
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#include <usb/s3c_udc.h>
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#include <usb/s3c_udc.h>
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#include <max8997_pmic.h>
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#include <max8997_pmic.h>
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#include <libtizen.h>
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#include "setup.h"
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#include "setup.h"
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@@ -496,6 +497,13 @@ void init_panel_info(vidinfo_t *vid)
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vid->reset_delay = 0;
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vid->reset_delay = 0;
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vid->interface_mode = FIMD_RGB_INTERFACE;
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vid->interface_mode = FIMD_RGB_INTERFACE;
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vid->mipi_enabled = 1;
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vid->mipi_enabled = 1;
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vid->logo_on = 1,
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vid->resolution = HD_RESOLUTION,
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vid->rgb_mode = MODE_RGB_P,
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#ifdef CONFIG_TIZEN
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get_tizen_logo_info(vid);
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#endif
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if (hwrevision(2))
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if (hwrevision(2))
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mipi_lcd_device.reverse_panel = 1;
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mipi_lcd_device.reverse_panel = 1;
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@@ -67,6 +67,18 @@ static void exynos_lcd_init(vidinfo_t *vid)
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exynos_fimd_lcd_init(vid);
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exynos_fimd_lcd_init(vid);
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}
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}
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static void draw_logo(void)
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{
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int x, y;
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ulong addr;
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x = ((panel_width - panel_info.logo_width) >> 1);
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y = ((panel_height - panel_info.logo_height) >> 1) - 4;
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addr = panel_info.logo_addr;
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bmp_display(addr, x, y);
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}
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static void lcd_panel_on(vidinfo_t *vid)
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static void lcd_panel_on(vidinfo_t *vid)
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{
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{
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udelay(vid->init_delay);
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udelay(vid->init_delay);
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@@ -118,6 +130,13 @@ void lcd_ctrl_init(void *lcdbase)
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void lcd_enable(void)
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void lcd_enable(void)
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{
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{
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if (panel_info.logo_on) {
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memset(lcd_base, 0, panel_width * panel_height *
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(NBITS(panel_info.vl_bpix) >> 3));
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draw_logo();
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}
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lcd_panel_on(&panel_info);
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lcd_panel_on(&panel_info);
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}
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}
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@@ -27,13 +27,6 @@
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#define MAX_CLOCK (86 * 1000000)
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#define MAX_CLOCK (86 * 1000000)
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enum exynos_fb_rgb_mode_t {
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MODE_RGB_P = 0,
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MODE_BGR_P = 1,
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MODE_RGB_S = 2,
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MODE_BGR_S = 3,
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};
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enum exynos_cpu_auto_cmd_rate {
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enum exynos_cpu_auto_cmd_rate {
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DISABLE_AUTO_FRM,
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DISABLE_AUTO_FRM,
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PER_TWO_FRM,
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PER_TWO_FRM,
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@@ -273,7 +273,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
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/* store panel info to global variable */
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/* store panel info to global variable */
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pvid = vid;
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pvid = vid;
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rgb_mode = MODE_RGB_P;
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rgb_mode = vid->rgb_mode;
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if (vid->interface_mode == FIMD_RGB_INTERFACE) {
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if (vid->interface_mode == FIMD_RGB_INTERFACE) {
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cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
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cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
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@@ -34,6 +34,7 @@
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#define CONFIG_S5P /* which is in a S5P Family */
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#define CONFIG_S5P /* which is in a S5P Family */
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#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
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#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
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#define CONFIG_TRATS /* working with TRATS */
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#define CONFIG_TRATS /* working with TRATS */
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#define CONFIG_TIZEN /* TIZEN lib */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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@@ -217,9 +218,12 @@
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/* LCD */
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/* LCD */
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#define CONFIG_EXYNOS_FB
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#define CONFIG_EXYNOS_FB
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#define CONFIG_LCD
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#define CONFIG_LCD
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_32BPP
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#define CONFIG_FB_ADDR 0x52504000
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#define CONFIG_FB_ADDR 0x52504000
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#define CONFIG_S6E8AX0
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#define CONFIG_S6E8AX0
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#define CONFIG_EXYNOS_MIPI_DSIM
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#define CONFIG_EXYNOS_MIPI_DSIM
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1280 * 720 * 4)
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
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#endif /* __CONFIG_H */
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#endif /* __CONFIG_H */
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@@ -191,6 +191,13 @@ enum {
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FIMD_CPU_INTERFACE = 2,
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FIMD_CPU_INTERFACE = 2,
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};
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};
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enum exynos_fb_rgb_mode_t {
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MODE_RGB_P = 0,
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MODE_BGR_P = 1,
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MODE_RGB_S = 2,
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MODE_BGR_S = 3,
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};
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typedef struct vidinfo {
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typedef struct vidinfo {
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ushort vl_col; /* Number of columns (i.e. 640) */
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ushort vl_col; /* Number of columns (i.e. 640) */
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ushort vl_row; /* Number of rows (i.e. 480) */
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ushort vl_row; /* Number of rows (i.e. 480) */
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@@ -236,6 +243,12 @@ typedef struct vidinfo {
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unsigned int wr_setup;
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unsigned int wr_setup;
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unsigned int wr_act;
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unsigned int wr_act;
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unsigned int wr_hold;
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unsigned int wr_hold;
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unsigned int logo_on;
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unsigned int logo_width;
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unsigned int logo_height;
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unsigned long logo_addr;
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unsigned int rgb_mode;
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unsigned int resolution;
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/* parent clock name(MPLL, EPLL or VPLL) */
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/* parent clock name(MPLL, EPLL or VPLL) */
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unsigned int pclk_name;
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unsigned int pclk_name;
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