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dm: dts: Convert driver model tags to use new schema

Browse Source 
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2023-02-13 08:56:33 -07:00
parent c74e03417b
commit 8c103c33fb
564 changed files with 4216 additions and 4216 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arc/dts/abilis_tb100.dts
View File

@@ -18,7 +18,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

2
arch/arc/dts/axc001.dtsi
View File

@@ -11,7 +11,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <750000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

2
arch/arc/dts/axc003.dtsi
View File

@@ -11,7 +11,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

6
arch/arc/dts/axs10x_mb.dtsi
View File

@@ -13,11 +13,11 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0xe0000000 0x10000000>;
u-boot,dm-pre-reloc;
bootph-all;
clocks {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
bootph-all;
apbclk: apbclk {
compatible = "fixed-clock";
@@ -29,7 +29,7 @@
compatible = "fixed-clock";
clock-frequency = <33333333>;
#clock-cells = <0>;
u-boot,dm-pre-reloc;
bootph-all;
};
mmcclk_ciu: mmcclk-ciu {

2
arch/arc/dts/emsdp.dts
View File

@@ -21,7 +21,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

2
arch/arc/dts/hsdk-common.dtsi
View File

@@ -23,7 +23,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

2
arch/arc/dts/iot_devkit.dts
View File

@@ -19,7 +19,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <144000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

2
arch/arc/dts/nsim.dts
View File

@@ -18,7 +18,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <70000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

2
arch/arc/dts/skeleton.dtsi
View File

@@ -14,7 +14,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
timer@0 {
compatible = "snps,arc-timer";

48
arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi
View File

@@ -6,69 +6,69 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@0
{
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
target-module@7000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
target-module@9000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
};
};
&wkup_cm {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_wkup_clkctrl {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
target-module@4c000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
};
segment@100000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
target-module@ac000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
target-module@ae000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
};
};
&prcm {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio0_target {
u-boot,dm-pre-reloc;
bootph-all;
};
&prcm_clocks {
@@ -80,33 +80,33 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio3 {
u-boot,dm-pre-reloc;
bootph-all;
};

28
arch/arm/dts/am335x-brsmarc1.dts
View File

@@ -122,7 +122,7 @@
};
&uart0 { /* console uart */
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
};
@@ -139,12 +139,12 @@
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
clock-frequency = <100000>;
tps: tps@24 { /* PMIC controller */
u-boot,dm-spl;
bootph-pre-ram;
reg = <0x24>;
compatible = "ti,tps65217";
};
@@ -176,12 +176,12 @@
};
&i2c1 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
};
&spi0 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>,
@@ -192,8 +192,8 @@
spi-max-frequency = <24000000>;
spi_flash: spiflash@0 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
bootph-pre-ram;
bootph-all;
compatible = "spidev", "spi-flash";
spi-max-frequency = <24000000>;
reg = <0>;
@@ -201,7 +201,7 @@
};
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
cs-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>,
<&gpio0 19 GPIO_ACTIVE_HIGH>,
@@ -302,10 +302,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
@@ -327,22 +327,22 @@
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio1 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio2 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio3 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};

22
arch/arm/dts/am335x-brxre1.dts
View File

@@ -113,7 +113,7 @@
};
&uart0 { /* console uart */
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
};
@@ -130,12 +130,12 @@
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
clock-frequency = <100000>;
tps: tps@24 { /* PMIC controller */
u-boot,dm-spl;
bootph-pre-ram;
reg = <0x24>;
compatible = "ti,tps65217";
@@ -233,7 +233,7 @@
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x4>;
ti,non-removable;
@@ -243,7 +243,7 @@
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x8>;
ti,non-removable;
@@ -257,10 +257,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
@@ -282,22 +282,22 @@
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio1 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio2 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio3 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};

22
arch/arm/dts/am335x-evm-u-boot.dtsi
View File

@@ -6,14 +6,14 @@
#include "am33xx-u-boot.dtsi"
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@300000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@@ -28,27 +28,27 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@9000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};

4
arch/arm/dts/am335x-evmsk-u-boot.dtsi
View File

@@ -12,10 +12,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

28
arch/arm/dts/am335x-guardian-u-boot.dtsi
View File

@@ -8,12 +8,12 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_per {
@@ -21,25 +21,25 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&scm {
u-boot,dm-pre-reloc;
bootph-all;
};
&spi0 {
@@ -54,31 +54,31 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb_ctrl_mod {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb0_phy {
u-boot,dm-pre-reloc;
bootph-all;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
bootph-all;
lcd0_pins: pinmux_lcd0_pins {
pinctrl-single,pins = <

30
arch/arm/dts/am335x-pdu001-u-boot.dtsi
View File

@@ -6,65 +6,65 @@
#include "am33xx-u-boot.dtsi"
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
target-module@10000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@100000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@a6000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
};
&scm {
u-boot,dm-pre-reloc;
bootph-all;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart3_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart3 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2_pins {
u-boot,dm-pre-reloc;
bootph-all;
};

4
arch/arm/dts/am335x-pxm50-u-boot.dtsi
View File

@@ -12,10 +12,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

8
arch/arm/dts/am335x-regor-rdk-u-boot.dtsi
View File

@@ -15,19 +15,19 @@
};
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

4
arch/arm/dts/am335x-rut-u-boot.dtsi
View File

@@ -12,10 +12,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

18
arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi
View File

@@ -9,36 +9,36 @@
&l4_wkup {
segment@200000 {
target-module@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&prcm {
u-boot,dm-pre-reloc;
bootph-all;
};
&per_cm {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4ls_clkctrl {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@0 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@30000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&spi0 {
u-boot,dm-pre-reloc;
bootph-all;
channel@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};

20
arch/arm/dts/am335x-shc-u-boot.dtsi
View File

@@ -7,45 +7,45 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
};
&scm {
u-boot,dm-pre-reloc;
bootph-all;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&emmc_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc3 {

14
arch/arm/dts/am335x-wega-rdk-u-boot.dtsi
View File

@@ -15,16 +15,16 @@
};
ocp {
u-boot,dm-pre-reloc;
bootph-all;
l4_wkup@44c00000 {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@9000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@@ -32,14 +32,14 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

2
arch/arm/dts/am33xx-u-boot.dtsi
View File

@@ -6,7 +6,7 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};

18
arch/arm/dts/am3517-evm-u-boot.dtsi
View File

@@ -18,37 +18,37 @@
};
&gpio1 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio2 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio3 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio5 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio6 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&mmc2 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&mmc3 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&uart1 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&uart2 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};

4
arch/arm/dts/am4372-generic-u-boot.dtsi
View File

@@ -7,10 +7,10 @@
/{
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};

20
arch/arm/dts/am4372-u-boot.dtsi
View File

@@ -27,41 +27,41 @@
};
&dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&am43xx_control_usb2phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ocp2scp0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&dwc3_2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb2_phy2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&am43xx_control_usb2phy2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ocp2scp1 {
u-boot,dm-spl;
bootph-pre-ram;
};

24
arch/arm/dts/am437x-gp-evm-u-boot.dtsi
View File

@@ -11,50 +11,50 @@
/{
ocp {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&uart0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mac {
u-boot,dm-spl;
bootph-pre-ram;
};
&davinci_mdio {
u-boot,dm-spl;
bootph-pre-ram;
};
&cpsw_emac0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&phy_sel {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&l4_wkup {
u-boot,dm-spl;
bootph-pre-ram;
};
&scm {
u-boot,dm-spl;
bootph-pre-ram;
};
&scm_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&ethphy0 {
u-boot,dm-spl;
bootph-pre-ram;
};

8
arch/arm/dts/am437x-idk-evm-u-boot.dtsi
View File

@@ -7,7 +7,7 @@
/{
ocp {
u-boot,dm-spl;
bootph-pre-ram;
};
xtal25mhz: xtal25mhz {
@@ -18,11 +18,11 @@
};
&uart0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
cdce913: cdce913@65 {
compatible = "ti,cdce913";
@@ -34,5 +34,5 @@
};
&mmc1 {
u-boot,dm-spl;
bootph-pre-ram;
};

8
arch/arm/dts/am437x-sk-evm-u-boot.dtsi
View File

@@ -7,18 +7,18 @@
/{
ocp {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&uart0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc1 {
u-boot,dm-spl;
bootph-pre-ram;
};

6
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
View File

@@ -21,15 +21,15 @@
};
&spi0 {
u-boot,dm-pre-reloc;
bootph-all;
spi-flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&eth0 {

6
arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
View File

@@ -21,15 +21,15 @@
};
&spi0 {
u-boot,dm-pre-reloc;
bootph-all;
spi-flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sb {

2
arch/arm/dts/armada-385-atl-x530-u-boot.dtsi
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
&watchdog {
u-boot,dm-pre-reloc;
bootph-all;
};
#include "mvebu-u-boot.dtsi"

12
arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
View File

@@ -12,24 +12,24 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
i2cmux: i2cmux@70 {
u-boot,dm-pre-reloc;
bootph-all;
i2c@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
i2c@1 {
u-boot,dm-pre-reloc;
bootph-all;
};
i2c@5 {
u-boot,dm-pre-reloc;
bootph-all;
crypto@64 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

18
arch/arm/dts/armada-388-clearfog-u-boot.dtsi
View File

@@ -1,38 +1,38 @@
// SPDX-License-Identifier: GPL-2.0+
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
spi-flash@0 {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&sdhci {
u-boot,dm-spl;
bootph-pre-ram;
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
eeprom@52 {
u-boot,dm-spl;
bootph-pre-ram;
};
eeprom@53 {
u-boot,dm-spl;
bootph-pre-ram;
};
};

20
arch/arm/dts/armada-388-helios4-u-boot.dtsi
View File

@@ -5,41 +5,41 @@
};
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
spi-flash@0 {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&w25q32 {
u-boot,dm-spl;
bootph-pre-ram;
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&sdhci {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
eeprom@52 {
u-boot,dm-spl;
bootph-pre-ram;
};
eeprom@53 {
u-boot,dm-spl;
bootph-pre-ram;
};
};

12
arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi
View File

@@ -1,25 +1,25 @@
&gpio0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&spi1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&I2C0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&PCA22 {
u-boot,dm-pre-reloc;
bootph-all;
};
#include "mvebu-u-boot.dtsi"

8
arch/arm/dts/armada-ap80x-quad.dtsi
View File

@@ -18,7 +18,7 @@
cpu@000 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x000>;
@@ -26,7 +26,7 @@
};
cpu@001 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x001>;
@@ -34,7 +34,7 @@
};
cpu@100 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x100>;
@@ -42,7 +42,7 @@
};
cpu@101 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x101>;

2
arch/arm/dts/armada-xp-theadorable-u-boot.dtsi
View File

@@ -1,5 +1,5 @@
&lcd0 {
u-boot,dm-pre-reloc;
bootph-all;
};
#include "mvebu-u-boot.dtsi"

8
arch/arm/dts/ast2500-evb.dts
View File

@@ -19,7 +19,7 @@
};
&uart5 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@@ -28,17 +28,17 @@
};
&wdt1 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
&wdt2 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
&wdt3 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

8
arch/arm/dts/ast2500-u-boot.dtsi
View File

@@ -8,19 +8,19 @@
scu: clock-controller@1e6e2000 {
compatible = "aspeed,ast2500-scu";
reg = <0x1e6e2000 0x1000>;
u-boot,dm-pre-reloc;
bootph-all;
#clock-cells = <1>;
#reset-cells = <1>;
};
rst: reset-controller {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2500-reset";
#reset-cells = <1>;
};
sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2500-sdrammc";
reg = <0x1e6e0000 0x174
0x1e6e0200 0x1d4 >;
@@ -51,7 +51,7 @@
};
&timer {
u-boot,dm-pre-reloc;
bootph-all;
};
&mac0 {

6
arch/arm/dts/ast2600-evb.dts
View File

@@ -58,7 +58,7 @@
};
&uart5 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@@ -258,11 +258,11 @@
};
&hace {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
&acry {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

10
arch/arm/dts/ast2600-u-boot.dtsi
View File

@@ -8,21 +8,21 @@
scu: clock-controller@1e6e2000 {
compatible = "aspeed,ast2600-scu";
reg = <0x1e6e2000 0x1000>;
u-boot,dm-pre-reloc;
bootph-all;
#clock-cells = <1>;
#reset-cells = <1>;
uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/
};
rst: reset-controller {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2600-reset";
aspeed,wdt = <&wdt1>;
#reset-cells = <1>;
};
sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2600-sdrammc";
reg = <0x1e6e0000 0x100
0x1e6e0100 0x300
@@ -33,10 +33,10 @@
};
ahb {
u-boot,dm-pre-reloc;
bootph-all;
apb {
u-boot,dm-pre-reloc;
bootph-all;
};
};

34
arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
View File

@@ -10,70 +10,70 @@
/ {
ahb {
u-boot,dm-pre-reloc;
bootph-all;
apb {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&clk32 {
u-boot,dm-pre-reloc;
bootph-all;
};
&dbgu {
u-boot,dm-pre-reloc;
bootph-all;
};
&main_rc {
u-boot,dm-pre-reloc;
bootph-all;
};
&main_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_dbgu {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioA {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioB {
u-boot,dm-pre-reloc;
bootph-all;
};
&pit64b0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pmc {
u-boot,dm-pre-reloc;
bootph-all;
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_rc_osc {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};

16
arch/arm/dts/at91-sama5d27_giantboard.dts
View File

@@ -22,7 +22,7 @@
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart1;
};
@@ -32,7 +32,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@@ -41,7 +41,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
i2c0: i2c@f8028000 {
@@ -65,12 +65,12 @@
pit: timer@f8048030 {
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sfr: sfr@f8030000 {
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
pioA: pinctrl@fc038000 {
@@ -82,14 +82,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -97,7 +97,7 @@
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_i2c0_default: i2c0_default {

24
arch/arm/dts/at91-sama5d27_som1_ek.dts
View File

@@ -51,7 +51,7 @@
compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart1;
};
@@ -85,7 +85,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sdmmc1: sdio-host@b0000000 {
@@ -93,7 +93,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@@ -103,10 +103,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
@@ -117,7 +117,7 @@
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@@ -126,7 +126,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
pioA: pinctrl@fc038000 {
@@ -178,7 +178,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
@@ -186,7 +186,7 @@
<PIN_PA10__SDMMC0_RSTN>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -198,14 +198,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -213,7 +213,7 @@
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_usb_default: usb_default {

20
arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
View File

@@ -9,42 +9,42 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&hlcdc {
u-boot,dm-pre-reloc;
bootph-all;
};
&qspi1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&qspi1_flash {
u-boot,dm-pre-reloc;
bootph-all;
};
&sdmmc0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&sfr {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_uart0_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_qspi1_default {
u-boot,dm-pre-reloc;
bootph-all;
};

18
arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
View File

@@ -9,39 +9,39 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_qspi1_sck_cs_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_qspi1_dat_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&qspi1 {
u-boot,dm-pre-reloc;
bootph-all;
flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&sdmmc0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 { /* mikrobus1 uart */
u-boot,dm-pre-reloc;
bootph-all;
};

18
arch/arm/dts/at91-sama5d2_ptc_ek.dts
View File

@@ -52,7 +52,7 @@
compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart0;
};
@@ -96,7 +96,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sdmmc1: sdio-host@b0000000 {
@@ -104,7 +104,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "disabled"; /* conflicts with nand and qspi0*/
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@@ -123,7 +123,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
i2c1: i2c@fc028000 {
@@ -175,7 +175,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
@@ -184,7 +184,7 @@
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -196,14 +196,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -211,7 +211,7 @@
pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_usb_default: usb_default {

38
arch/arm/dts/at91-sama5d2_xplained.dts
View File

@@ -8,7 +8,7 @@
compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart1;
};
@@ -46,7 +46,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sdmmc1: sdio-host@b0000000 {
@@ -54,7 +54,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@@ -64,10 +64,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
@@ -78,7 +78,7 @@
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@@ -87,7 +87,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
flash@0 {
compatible = "jedec,spi-nor";
@@ -95,7 +95,7 @@
spi-max-frequency = <83000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -104,13 +104,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -129,7 +129,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
i2c1: i2c@fc028000 {
@@ -208,7 +208,7 @@
pinmux = <PIN_PA22__QSPI0_SCK>,
<PIN_PA23__QSPI0_CS>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_qspi0_dat_default: qspi0_dat_default {
@@ -217,7 +217,7 @@
<PIN_PA26__QSPI0_IO2>,
<PIN_PA27__QSPI0_IO3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_sdmmc0_default: sdmmc0_default {
@@ -232,7 +232,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd_default {
@@ -241,7 +241,7 @@
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -253,14 +253,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -269,14 +269,14 @@
<PIN_PA15__SPI0_MOSI>,
<PIN_PA16__SPI0_MISO>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_uart1_default: uart1_default {
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_usb_default: usb_default {

14
arch/arm/dts/at91-sama5d3_xplained.dts
View File

@@ -14,7 +14,7 @@
compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@@ -51,7 +51,7 @@
ahb {
apb {
mmc0: mmc@f0000000 {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
vmmc-supply = <&vcc_mmc0_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
@@ -64,7 +64,7 @@
};
mmc1: mmc@f8000000 {
u-boot,dm-pre-reloc;
bootph-all;
vmmc-supply = <&vcc_3v3_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
status = "disabled";
@@ -215,13 +215,13 @@
};
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
pinctrl@fffff200 {
board {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_i2c0_pu: i2c0_pu {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
@@ -240,13 +240,13 @@
};
pinctrl_mmc0_cd: mmc0_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};

20
arch/arm/dts/at91-sama5d4_xplained.dts
View File

@@ -54,7 +54,7 @@
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &usart3;
};
@@ -92,10 +92,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
@@ -106,17 +106,17 @@
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
spi0: spi@f8010000 {
u-boot,dm-pre-reloc;
bootph-all;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay";
spi_flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
@@ -146,7 +146,7 @@
};
mmc1: mmc@fc000000 {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
vmmc-supply = <&vcc_mmc1_reg>;
@@ -160,7 +160,7 @@
};
usart3: serial@fc00c000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@@ -193,9 +193,9 @@
pinctrl@fc06a000 {
board {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};

20
arch/arm/dts/at91-sama5d4ek.dts
View File

@@ -54,7 +54,7 @@
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &usart3;
};
@@ -82,10 +82,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
800x480 {
clock-frequency = <33260000>;
hactive = <800>;
@@ -96,7 +96,7 @@
vfront-porch = <23>;
vback-porch = <22>;
vsync-len = <5>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@@ -132,11 +132,11 @@
};
spi0: spi@f8010000 {
u-boot,dm-pre-reloc;
bootph-all;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay";
spi_flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
@@ -186,7 +186,7 @@
};
mmc1: mmc@fc000000 {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
status = "okay";
@@ -202,7 +202,7 @@
};
usart3: serial@fc00c000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@@ -216,7 +216,7 @@
pinctrl@fc06a000 {
board {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_macb0_phy_irq: macb0_phy_irq {
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
@@ -226,7 +226,7 @@
<AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};

24
arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
View File

@@ -16,7 +16,7 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
utmi {
@@ -68,7 +68,7 @@
};
soc {
u-boot,dm-pre-reloc;
bootph-all;
usb2: usb@400000 {
compatible = "microchip,sama7g5-ohci", "usb-ohci";
@@ -96,23 +96,23 @@
};
&main_rc {
u-boot,dm-pre-reloc;
bootph-all;
};
&main_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioA {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_flx3_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioA {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_usb_default: usb_default {
pinmux = <PIN_PC6__GPIO>;
@@ -121,23 +121,23 @@
};
&pit64b0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pmc {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_rc_osc {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart3 {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb2 {

4
arch/arm/dts/at91sam9260-smartweb.dts
View File

@@ -18,7 +18,7 @@
compatible = "atmel,at91sam9260", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@@ -49,7 +49,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

26
arch/arm/dts/at91sam9260.dtsi
View File

@@ -77,14 +77,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@@ -107,7 +107,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@@ -165,7 +165,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 105000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@@ -230,24 +230,24 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
adc_clk: adc_clk@5 {
@@ -410,7 +410,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@@ -422,7 +422,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@@ -434,7 +434,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl: pinctrl@fffff400 {
@@ -453,11 +453,11 @@
0xffffffff 0x7fff3ccf /* pioB */
0xffffffff 0x007fffff /* pioC */
>;
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */

4
arch/arm/dts/at91sam9260ek.dts
View File

@@ -50,7 +50,7 @@
compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@@ -124,7 +124,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

26
arch/arm/dts/at91sam9261.dtsi
View File

@@ -68,7 +68,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
@@ -295,7 +295,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@@ -307,7 +307,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@@ -319,7 +319,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl@fffff400 {
@@ -336,11 +336,11 @@
<0xffffffff 0xfffffff7>, /* pioA */
<0xffffffff 0xfffffff4>, /* pioB */
<0xffffffff 0xffffff07>; /* pioC */
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
@@ -583,7 +583,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@@ -628,7 +628,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@@ -729,24 +729,24 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
usart0_clk: usart0_clk@6 {

26
arch/arm/dts/at91sam9263.dtsi
View File

@@ -75,14 +75,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@@ -100,7 +100,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@@ -146,7 +146,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 120000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@@ -235,24 +235,24 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioCDE_clk: pioCDE_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
usart0_clk: usart0_clk@7 {
@@ -730,7 +730,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff400 {
@@ -742,7 +742,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff600 {
@@ -754,7 +754,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD: gpio@fffff800 {
@@ -766,7 +766,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioE: gpio@fffffa00 {
@@ -778,7 +778,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
dbgu: serial@ffffee00 {

4
arch/arm/dts/at91sam9263ek.dts
View File

@@ -15,7 +15,7 @@
chosen {
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@@ -35,7 +35,7 @@
ahb {
apb {
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

2
arch/arm/dts/at91sam9g15ek.dts
View File

@@ -18,7 +18,7 @@
ahb {
apb {
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
};

6
arch/arm/dts/at91sam9g20-taurus.dts
View File

@@ -18,7 +18,7 @@
compatible = "atmel,at91sam9g20", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@@ -58,7 +58,7 @@
};
&pinctrl {
u-boot,dm-pre-reloc;
bootph-all;
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins =
@@ -114,7 +114,7 @@
};
&watchdog {
u-boot,dm-pre-reloc;
bootph-all;
timeout-sec = <15>;
status = "okay";
};

4
arch/arm/dts/at91sam9g20ek_common.dtsi
View File

@@ -9,7 +9,7 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@@ -47,7 +47,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

2
arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi
View File

@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
&dbgu {
u-boot,dm-pre-reloc;
bootph-all;
};

2
arch/arm/dts/at91sam9g35ek.dts
View File

@@ -23,7 +23,7 @@
};
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
};

4
arch/arm/dts/at91sam9g45-corvus.dts
View File

@@ -17,7 +17,7 @@
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@@ -38,7 +38,7 @@
ahb {
apb {
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

4
arch/arm/dts/at91sam9g45-gurnard.dts
View File

@@ -32,10 +32,10 @@
};
ahb {
u-boot,dm-pre-reloc;
bootph-all;
fb@0x00500000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
display-timings {
rev1 {

12
arch/arm/dts/at91sam9g45.dtsi
View File

@@ -81,14 +81,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@@ -120,7 +120,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@@ -173,7 +173,7 @@
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@@ -441,7 +441,7 @@
0xfffff800 0x200
0xfffffa00 0x200
>;
u-boot,dm-pre-reloc;
bootph-all;
atmel,mux-mask = <
/* A B */
@@ -484,7 +484,7 @@
};
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP

4
arch/arm/dts/at91sam9m10g45ek.dts
View File

@@ -17,7 +17,7 @@
chosen {
bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@@ -38,7 +38,7 @@
apb {
dbgu: serial@ffffee00 {
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
usart1: serial@fff90000 {

26
arch/arm/dts/at91sam9n12.dtsi
View File

@@ -72,14 +72,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@@ -104,7 +104,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
@@ -171,7 +171,7 @@
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@@ -247,18 +247,18 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioAB_clk: pioAB_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioCD_clk: pioCD_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
fuse_clk: fuse_clk@4 {
@@ -505,11 +505,11 @@
0xfdffffff 0x07c00000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
@@ -806,7 +806,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioAB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@@ -818,7 +818,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioAB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@@ -830,7 +830,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCD_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD: gpio@fffffa00 {
@@ -842,7 +842,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCD_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
dbgu: serial@fffff200 {

4
arch/arm/dts/at91sam9n12ek.dts
View File

@@ -16,7 +16,7 @@
chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@@ -36,7 +36,7 @@
ahb {
apb {
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

30
arch/arm/dts/at91sam9rl.dtsi
View File

@@ -78,7 +78,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
fb0: fb@00500000 {
compatible = "atmel,at91sam9rl-lcdc";
@@ -113,7 +113,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
@@ -398,7 +398,7 @@
<0xffffffff 0x0000c780>, /* pioB */
<0xffffffff 0xe3ffff0e>, /* pioC */
<0x003fffff 0x0001ff3c>; /* pioD */
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
adc0 {
@@ -440,7 +440,7 @@
};
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
@@ -779,7 +779,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@@ -791,7 +791,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@@ -803,7 +803,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD: gpio@fffffa00 {
@@ -815,7 +815,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioD_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pmc: pmc@fffffc00 {
@@ -826,7 +826,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
@@ -862,7 +862,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
prog: progck {
@@ -909,30 +909,30 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD_clk: pioD_clk@5 {
#clock-cells = <0>;
reg = <5>;
u-boot,dm-pre-reloc;
bootph-all;
};
usart0_clk: usart0_clk@6 {

4
arch/arm/dts/at91sam9rlek.dts
View File

@@ -15,7 +15,7 @@
chosen {
bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@@ -162,7 +162,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

2
arch/arm/dts/at91sam9x35ek.dts
View File

@@ -22,7 +22,7 @@
status = "okay";
};
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
};

14
arch/arm/dts/at91sam9x5.dtsi
View File

@@ -81,14 +81,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@@ -113,7 +113,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
@@ -176,7 +176,7 @@
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres;
u-boot,dm-pre-reloc;
bootph-all;
};
@@ -259,7 +259,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioAB_clk: pioAB_clk@2 {
@@ -466,12 +466,12 @@
0xfffff800 0x200 /* pioC */
0xfffffa00 0x200 /* pioD */
>;
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP

4
arch/arm/dts/at91sam9x5dm.dtsi
View File

@@ -31,7 +31,7 @@
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
800x480 {
clock-frequency = <24000000>;
hactive = <800>;
@@ -42,7 +42,7 @@
vfront-porch = <22>;
vback-porch = <21>;
vsync-len = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

4
arch/arm/dts/at91sam9x5ek.dtsi
View File

@@ -15,7 +15,7 @@
chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
ahb {
@@ -47,7 +47,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

10
arch/arm/dts/bcm283x-u-boot.dtsi
View File

@@ -27,22 +27,22 @@
&uart0 {
skip-init;
u-boot,dm-pre-reloc;
bootph-all;
};
&uart1 {
skip-init;
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0_gpio14 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart1_gpio14 {
u-boot,dm-pre-reloc;
bootph-all;
};

4
arch/arm/dts/bcm63158.dtsi
View File

@@ -74,7 +74,7 @@
};
clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk: periph-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -134,7 +134,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";

4
arch/arm/dts/bcm6855.dtsi
View File

@@ -65,7 +65,7 @@
};
clocks: clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk: periph-clk {
compatible = "fixed-clock";
@@ -126,7 +126,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";

4
arch/arm/dts/bcm6856.dtsi
View File

@@ -55,7 +55,7 @@
};
clocks: clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk:periph-clk {
compatible = "fixed-clock";
@@ -109,7 +109,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";

4
arch/arm/dts/bcm6858.dtsi
View File

@@ -74,7 +74,7 @@
};
clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk: periph_clk {
compatible = "fixed-clock";
@@ -128,7 +128,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";

2
arch/arm/dts/bcm96753ref.dts
View File

@@ -28,7 +28,7 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

2
arch/arm/dts/bcm968360bg.dts
View File

@@ -26,7 +26,7 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

2
arch/arm/dts/bcm968580xref.dts
View File

@@ -26,7 +26,7 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

4
arch/arm/dts/bitmain-antminer-s9.dts
View File

@@ -70,13 +70,13 @@
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
disable-wp;
};
&uart1 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

2
arch/arm/dts/ca-presidio-engboard.dts
View File

@@ -40,7 +40,7 @@
};
uart0: serial@0xf4329148 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "cortina,ca-uart";
reg = <0x0 0xf4329148 0x30>;
status = "okay";

12
arch/arm/dts/da850-evm-u-boot.dtsi
View File

@@ -8,7 +8,7 @@
/ {
soc@1c00000 {
u-boot,dm-spl;
bootph-pre-ram;
};
nand {
@@ -16,7 +16,7 @@
};
panel {
u-boot,dm-pre-reloc;
bootph-all;
};
};
@@ -29,17 +29,17 @@
};
&mmc0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&serial2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&gpio {
u-boot,dm-spl;
bootph-pre-ram;
};

8
arch/arm/dts/da850-lcdk-u-boot.dtsi
View File

@@ -13,7 +13,7 @@
};
soc@1c00000 {
u-boot,dm-spl;
bootph-pre-ram;
};
nand {
@@ -22,13 +22,13 @@
};
&mmc0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&serial2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&gpio {
u-boot,dm-spl;
bootph-pre-ram;
};

2
arch/arm/dts/dm8168-evm-u-boot.dtsi
View File

@@ -7,6 +7,6 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};

18
arch/arm/dts/dra7-evm-u-boot.dtsi
View File

@@ -15,38 +15,38 @@
};
&mmc2_pins_default {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_ddr_rev20 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs200 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_iodelay_hs200_rev20_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&omap_dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
dr_mode = "peripheral";
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb3_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};

40
arch/arm/dts/dra7-ipu-common-early-boot.dtsi
View File

@@ -9,7 +9,7 @@
};
fs_loader0: fs_loader@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "u-boot,fs-loader";
phandlepart = <&mmc1 1>;
};
@@ -18,14 +18,14 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
u-boot,dm-spl;
bootph-pre-ram;
ipu2_memory_region: ipu2-memory@95800000 {
compatible = "shared-dma-pool";
reg = <0x0 0x95800000 0x0 0x3800000>;
reusable;
status = "okay";
u-boot,dm-spl;
bootph-pre-ram;
};
ipu1_memory_region: ipu1-memory@9d000000 {
@@ -33,81 +33,81 @@
reg = <0x0 0x9d000000 0x0 0x2000000>;
reusable;
status = "okay";
u-boot,dm-spl;
bootph-pre-ram;
};
ipu1_pgtbl: ipu1-pgtbl@95700000 {
reg = <0x0 0x95700000 0x0 0x40000>;
no-map;
u-boot,dm-spl;
bootph-pre-ram;
};
ipu2_pgtbl: ipu2-pgtbl@95740000 {
reg = <0x0 0x95740000 0x0 0x40000>;
no-map;
u-boot,dm-spl;
bootph-pre-ram;
};
};
};
&timer3 {
u-boot,dm-spl;
bootph-pre-ram;
};
&timer4 {
u-boot,dm-spl;
bootph-pre-ram;
};
&timer7 {
u-boot,dm-spl;
bootph-pre-ram;
};
&timer8 {
u-boot,dm-spl;
bootph-pre-ram;
};
&timer9 {
u-boot,dm-spl;
bootph-pre-ram;
};
&timer11 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmu_ipu1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmu_ipu2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ipu1 {
status = "okay";
memory-region = <&ipu1_memory_region>;
pg-tbl = <&ipu1_pgtbl>;
u-boot,dm-spl;
bootph-pre-ram;
};
&ipu2 {
status = "okay";
memory-region = <&ipu2_memory_region>;
pg-tbl = <&ipu2_pgtbl>;
u-boot,dm-spl;
bootph-pre-ram;
};
&l4_wkup {
u-boot,dm-spl;
bootph-pre-ram;
};
&prm {
u-boot,dm-spl;
bootph-pre-ram;
};
&ipu1_rst {
u-boot,dm-spl;
bootph-pre-ram;
};
&ipu2_rst {
u-boot,dm-spl;
bootph-pre-ram;
};

20
arch/arm/dts/dra71-evm-u-boot.dtsi
View File

@@ -23,42 +23,42 @@
};
&mmc2_pins_default {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_ddr_rev20 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_iodelay_ddr_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs200 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_iodelay_hs200_rev20_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&omap_dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
dr_mode = "peripheral";
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb3_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};

20
arch/arm/dts/dra72-evm-revc-u-boot.dtsi
View File

@@ -23,42 +23,42 @@
};
&mmc2_pins_default {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_ddr_rev20 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_iodelay_ddr_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs200 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_iodelay_hs200_rev20_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&omap_dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
dr_mode = "peripheral";
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb3_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};

8
arch/arm/dts/dra72-evm-u-boot.dtsi
View File

@@ -6,18 +6,18 @@
#include "omap5-u-boot.dtsi"
&omap_dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
dr_mode = "peripheral";
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb3_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};

14
arch/arm/dts/dra76-evm-u-boot.dtsi
View File

@@ -15,30 +15,30 @@
};
&mmc2_pins_default {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_pins_hs200 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc2_iodelay_hs200_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&omap_dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
dr_mode = "peripheral";
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb3_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};

12
arch/arm/dts/dragonboard410c-uboot.dtsi
View File

@@ -8,26 +8,26 @@
/ {
smem {
u-boot,dm-pre-reloc;
bootph-all;
};
soc {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl@1000000 {
u-boot,dm-pre-reloc;
bootph-all;
uart {
u-boot,dm-pre-reloc;
bootph-all;
};
};
qcom,gcc@1800000 {
u-boot,dm-pre-reloc;
bootph-all;
};
serial@78b0000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

12
arch/arm/dts/dragonboard820c-uboot.dtsi
View File

@@ -7,26 +7,26 @@
/ {
smem {
u-boot,dm-pre-reloc;
bootph-all;
};
soc {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl@1010000 {
u-boot,dm-pre-reloc;
bootph-all;
uart {
u-boot,dm-pre-reloc;
bootph-all;
};
};
clock-controller@300000 {
u-boot,dm-pre-reloc;
bootph-all;
};
serial@75b0000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

8
arch/arm/dts/dragonboard845c-uboot.dtsi
View File

@@ -9,18 +9,18 @@
/
{
soc {
u-boot,dm-pre-reloc;
bootph-all;
serial@a84000 {
u-boot,dm-pre-reloc;
bootph-all;
};
clock-controller@100000 {
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_north@3900000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

4
arch/arm/dts/exynos5.dtsi
View File

@@ -137,7 +137,7 @@
};
fimd@14400000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "samsung,exynos-fimd";
reg = <0x14400000 0x10000>;
#address-cells = <1>;
@@ -218,7 +218,7 @@
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <0 54 0>;
u-boot,dm-pre-reloc;
bootph-all;
id = <3>;
};
};

2
arch/arm/dts/exynos5422-odroidxu3.dts
View File

@@ -31,7 +31,7 @@
};
adc@12D10000 {
u-boot,dm-pre-reloc;
bootph-all;
vdd-supply = <&ldo4_reg>;
status = "okay";
};

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