mirror of
https://xff.cz/git/u-boot/
synced 2025-09-28 05:51:17 +02:00
arm: dts: k3-am62x: sync dt with linux kernel
Sync the DT Files with linux kernel (tag v6.0.3) Signed-off-by: Dhruva Gole <d-gole@ti.com>
This commit is contained in:
Dhruva Gole
Tom Rini
@@ -165,6 +165,19 @@
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};
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};
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};
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};
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crypto: crypto@40900000 {
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compatible = "ti,am62-sa3ul";
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reg = <0x00 0x40900000 0x00 0x1200>;
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power-domains = <&k3_pds 70 TI_SCI_PD_SHARED>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
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dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
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<&main_pktdma 0x7507 0>;
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dma-names = "tx", "rx1", "rx2";
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};
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main_pmx0: pinctrl@f4000 {
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main_pmx0: pinctrl@f4000 {
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compatible = "pinctrl-single";
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compatible = "pinctrl-single";
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reg = <0x00 0xf4000 0x00 0x2ac>;
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reg = <0x00 0xf4000 0x00 0x2ac>;
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@@ -530,4 +543,45 @@
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ti,mbox-num-users = <4>;
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <16>;
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ti,mbox-num-fifos = <16>;
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};
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};
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ecap0: pwm@23100000 {
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compatible = "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x00 0x23100000 0x00 0x100>;
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power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 51 0>;
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clock-names = "fck";
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};
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ecap1: pwm@23110000 {
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compatible = "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x00 0x23110000 0x00 0x100>;
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power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 52 0>;
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clock-names = "fck";
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};
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ecap2: pwm@23120000 {
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compatible = "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x00 0x23120000 0x00 0x100>;
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power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 53 0>;
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clock-names = "fck";
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};
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main_mcan0: can@20701000 {
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compatible = "bosch,m_can";
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reg = <0x00 0x20701000 0x00 0x200>,
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<0x00 0x20708000 0x00 0x8000>;
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reg-names = "m_can", "message_ram";
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power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
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clock-names = "hclk", "cclk";
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "int0", "int1";
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bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
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};
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};
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};
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@@ -53,4 +53,32 @@
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power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
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power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 148 0>;
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clocks = <&k3_clks 148 0>;
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};
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};
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mcu_gpio_intr: interrupt-controller@4210000 {
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compatible = "ti,sci-intr";
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reg = <0x00 0x04210000 0x00 0x200>;
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ti,intr-trigger-type = <1>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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#interrupt-cells = <1>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <5>;
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ti,interrupt-ranges = <0 104 4>;
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};
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mcu_gpio0: gpio@4201000 {
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compatible = "ti,am64-gpio", "ti,keystone-gpio";
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reg = <0x00 0x4201000 0x00 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&mcu_gpio_intr>;
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interrupts = <30>, <31>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,ngpio = <24>;
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ti,davinci-gpio-unbanked = <0>;
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power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 79 0>;
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clock-names = "gpio";
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};
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};
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};
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@@ -66,6 +66,7 @@
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<0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>, /* DSS */
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<0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>, /* DSS */
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<0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core window */
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<0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core window */
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<0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core window */
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<0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core window */
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<0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA3UL */
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<0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>, /* SA3 sproxy data */
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<0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>, /* SA3 sproxy data */
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<0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */
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<0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */
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<0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>, /* SA3 sproxy config */
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<0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>, /* SA3 sproxy config */
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@@ -18,7 +18,12 @@
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aliases {
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aliases {
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serial2 = &main_uart0;
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serial2 = &main_uart0;
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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mmc1 = &sdhci1;
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mmc2 = &sdhci2;
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spi0 = &ospi0;
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ethernet0 = &cpsw_port1;
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ethernet1 = &cpsw_port2;
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};
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};
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chosen {
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chosen {
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@@ -38,6 +43,15 @@
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#size-cells = <2>;
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#size-cells = <2>;
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ranges;
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ranges;
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ramoops@9ca00000 {
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compatible = "ramoops";
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reg = <0x00 0x9ca00000 0x00 0x00100000>;
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record-size = <0x8000>;
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console-size = <0x8000>;
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ftrace-size = <0x00>;
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pmsg-size = <0x8000>;
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};
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secure_tfa_ddr: tfa@9e780000 {
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secure_tfa_ddr: tfa@9e780000 {
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reg = <0x00 0x9e780000 0x00 0x80000>;
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reg = <0x00 0x9e780000 0x00 0x80000>;
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alignment = <0x1000>;
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alignment = <0x1000>;
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@@ -56,6 +70,79 @@
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no-map;
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no-map;
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};
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};
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};
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};
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vmain_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_5v0: regulator-1 {
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/* Output of LM34936 */
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_3v3_sys: regulator-2 {
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/* output of LM61460-Q1 */
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_sys";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: regulator-3 {
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/* TPS22918DBVR */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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vin-supply = <&vcc_3v3_sys>;
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gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
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};
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vdd_sd_dv: regulator-4 {
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/* Output of TLV71033 */
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compatible = "regulator-gpio";
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vcc_5v0>;
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gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&usr_led_pins_default>;
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led-0 {
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label = "am62-sk:green:heartbeat";
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gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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function = LED_FUNCTION_HEARTBEAT;
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default-state = "off";
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};
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};
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};
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};
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&main_pmx0 {
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&main_pmx0 {
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@@ -66,6 +153,42 @@
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>;
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>;
|
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};
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};
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main_i2c0_pins_default: main-i2c0-pins-default {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
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AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
|
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|
>;
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};
|
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main_i2c1_pins_default: main-i2c1-pins-default {
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pinctrl-single,pins = <
|
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AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
|
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AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
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main_i2c2_pins_default: main-i2c2-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
|
||||||
|
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_mmc0_pins_default: main-mmc0-pins-default {
|
||||||
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pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
|
||||||
|
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
|
||||||
|
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
|
||||||
|
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
|
||||||
|
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
|
||||||
|
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
|
||||||
|
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
|
||||||
|
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
|
||||||
|
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
|
||||||
|
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
main_mmc1_pins_default: main-mmc1-pins-default {
|
main_mmc1_pins_default: main-mmc1-pins-default {
|
||||||
pinctrl-single,pins = <
|
pinctrl-single,pins = <
|
||||||
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
|
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
|
||||||
@@ -77,6 +200,81 @@
|
|||||||
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
|
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
usr_led_pins_default: usr-led-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_mdio1_pins_default: main-mdio1-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
|
||||||
|
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_rgmii1_pins_default: main-rgmii1-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
|
||||||
|
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
|
||||||
|
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
|
||||||
|
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
|
||||||
|
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
|
||||||
|
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
|
||||||
|
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
|
||||||
|
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
|
||||||
|
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
|
||||||
|
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
|
||||||
|
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
|
||||||
|
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_rgmii2_pins_default: main-rgmii2-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
|
||||||
|
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
|
||||||
|
AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
|
||||||
|
AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
|
||||||
|
AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
|
||||||
|
AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
|
||||||
|
AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
|
||||||
|
AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
|
||||||
|
AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
|
||||||
|
AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
|
||||||
|
AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
|
||||||
|
AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ospi0_pins_default: ospi0-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
|
||||||
|
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
|
||||||
|
AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
|
||||||
|
AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
|
||||||
|
AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
|
||||||
|
AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
|
||||||
|
AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
|
||||||
|
AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
|
||||||
|
AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
|
||||||
|
AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
|
||||||
|
AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&wkup_uart0 {
|
&wkup_uart0 {
|
||||||
@@ -128,10 +326,41 @@
|
|||||||
|
|
||||||
&main_i2c0 {
|
&main_i2c0 {
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||||
|
clock-frequency = <400000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&main_i2c1 {
|
&main_i2c1 {
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
exp1: gpio@22 {
|
||||||
|
compatible = "ti,tca6424";
|
||||||
|
reg = <0x22>;
|
||||||
|
gpio-controller;
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
|
||||||
|
"PRU_DETECT", "MMC1_SD_EN",
|
||||||
|
"VPP_LDO_EN", "EXP_PS_3V3_En",
|
||||||
|
"EXP_PS_5V0_En", "EXP_HAT_DETECT",
|
||||||
|
"GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
|
||||||
|
"UART1_FET_BUF_EN", "WL_LT_EN",
|
||||||
|
"GPIO_HDMI_RSTn", "CSI_GPIO1",
|
||||||
|
"CSI_GPIO2", "PRU_3V3_EN",
|
||||||
|
"HDMI_INTn", "TEST_GPIO2",
|
||||||
|
"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
|
||||||
|
"MCASP1_FET_SEL", "UART1_FET_SEL",
|
||||||
|
"TSINT#", "IO_EXP_TEST_LED";
|
||||||
|
|
||||||
|
interrupt-parent = <&main_gpio1>;
|
||||||
|
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <2>;
|
||||||
|
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&main_i2c2 {
|
&main_i2c2 {
|
||||||
@@ -142,9 +371,134 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&sdhci0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||||
|
ti,driver-strength-ohm = <50>;
|
||||||
|
disable-wp;
|
||||||
|
};
|
||||||
|
|
||||||
&sdhci1 {
|
&sdhci1 {
|
||||||
|
/* SD/MMC */
|
||||||
|
vmmc-supply = <&vdd_mmc1>;
|
||||||
|
vqmmc-supply = <&vdd_sd_dv>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||||
ti,driver-strength-ohm = <50>;
|
ti,driver-strength-ohm = <50>;
|
||||||
disable-wp;
|
disable-wp;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&cpsw3g {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_mdio1_pins_default
|
||||||
|
&main_rgmii1_pins_default
|
||||||
|
&main_rgmii2_pins_default>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw_port1 {
|
||||||
|
phy-mode = "rgmii-rxid";
|
||||||
|
phy-handle = <&cpsw3g_phy0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw_port2 {
|
||||||
|
phy-mode = "rgmii-rxid";
|
||||||
|
phy-handle = <&cpsw3g_phy1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw3g_mdio {
|
||||||
|
cpsw3g_phy0: ethernet-phy@0 {
|
||||||
|
reg = <0>;
|
||||||
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||||
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||||
|
ti,min-output-impedance;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpsw3g_phy1: ethernet-phy@1 {
|
||||||
|
reg = <1>;
|
||||||
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||||
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||||
|
ti,min-output-impedance;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mailbox0_cluster0 {
|
||||||
|
mbox_m4_0: mbox-m4-0 {
|
||||||
|
ti,mbox-rx = <0 0 0>;
|
||||||
|
ti,mbox-tx = <1 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ospi0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&ospi0_pins_default>;
|
||||||
|
|
||||||
|
flash@0{
|
||||||
|
compatible = "jedec,spi-nor";
|
||||||
|
reg = <0x0>;
|
||||||
|
spi-tx-bus-width = <8>;
|
||||||
|
spi-rx-bus-width = <8>;
|
||||||
|
spi-max-frequency = <25000000>;
|
||||||
|
cdns,tshsl-ns = <60>;
|
||||||
|
cdns,tsd2d-ns = <60>;
|
||||||
|
cdns,tchsh-ns = <60>;
|
||||||
|
cdns,tslch-ns = <60>;
|
||||||
|
cdns,read-delay = <4>;
|
||||||
|
|
||||||
|
partitions {
|
||||||
|
compatible = "fixed-partitions";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
label = "ospi.tiboot3";
|
||||||
|
reg = <0x0 0x80000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@80000 {
|
||||||
|
label = "ospi.tispl";
|
||||||
|
reg = <0x80000 0x200000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@280000 {
|
||||||
|
label = "ospi.u-boot";
|
||||||
|
reg = <0x280000 0x400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@680000 {
|
||||||
|
label = "ospi.env";
|
||||||
|
reg = <0x680000 0x40000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@6c0000 {
|
||||||
|
label = "ospi.env.backup";
|
||||||
|
reg = <0x6c0000 0x40000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@800000 {
|
||||||
|
label = "ospi.rootfs";
|
||||||
|
reg = <0x800000 0x37c0000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@3fc0000 {
|
||||||
|
label = "ospi.phypattern";
|
||||||
|
reg = <0x3fc0000 0x40000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ecap0 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ecap1 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ecap2 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_mcan0 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|||||||
Reference in New Issue
Block a user