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arm: dts: k3-j7200: Add USB related DT entries

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Add USB related DT entries to enable USB device mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Vignesh Raghavendra
2020-08-07 00:26:56 +05:30
committed by Lokesh Vutla
parent f8c1e893c8
commit 86c9bd4eb7
4 changed files with 80 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
View File

@@ -102,3 +102,17 @@
&exp2 { &exp2 {
u-boot,dm-spl; u-boot,dm-spl;
}; };
&main_usbss0_pins_default {
u-boot,dm-spl;
};
&usbss0 {
u-boot,dm-spl;
ti,usb2-only;
};
&usb0 {
dr_mode = "peripheral";
u-boot,dm-spl;
};

18
arch/arm/dts/k3-j7200-common-proc-board.dts
View File

@@ -30,6 +30,12 @@
J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
>; >;
}; };
main_usbss0_pins_default: main_usbss0_pins_default {
pinctrl-single,pins = <
J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
>;
};
}; };
&wkup_uart0 { &wkup_uart0 {
@@ -121,3 +127,15 @@
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
}; };
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
ti,vbus-divider;
ti,usb2-only;
};
&usb0 {
dr_mode = "otg";
maximum-speed = "high-speed";
};

30
arch/arm/dts/k3-j7200-main.dtsi
View File

@@ -310,4 +310,34 @@
clocks = <&k3_clks 193 1>; clocks = <&k3_clks 193 1>;
power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>; power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
}; };
usbss0: cdns_usb@4104000 {
compatible = "ti,j721e-usb";
reg = <0x00 0x4104000 0x00 0x100>;
dma-coherent;
power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 288 12>, <&k3_clks 288 3>;
clock-names = "usb2_refclk", "lpm_clk";
assigned-clocks = <&k3_clks 288 12>; /* USB2_REFCLK */
assigned-clock-parents = <&k3_clks 288 13>; /* HFOSC0 */
#address-cells = <2>;
#size-cells = <2>;
ranges;
usb0: usb@6000000 {
compatible = "cdns,usb3";
reg = <0x00 0x6000000 0x00 0x10000>,
<0x00 0x6010000 0x00 0x10000>,
<0x00 0x6020000 0x00 0x10000>;
reg-names = "otg", "xhci", "dev";
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
interrupt-names = "host",
"peripheral",
"otg";
maximum-speed = "super-speed";
dr_mode = "otg";
};
};
}; };

18
arch/arm/dts/k3-j7200-r5-common-proc-board.dts
View File

@@ -129,6 +129,12 @@
J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
>; >;
}; };
main_usbss0_pins_default: main_usbss0_pins_default {
pinctrl-single,pins = <
J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
>;
};
}; };
&wkup_uart0 { &wkup_uart0 {
@@ -196,4 +202,16 @@
}; };
}; };
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
ti,vbus-divider;
ti,usb2-only;
};
&usb0 {
dr_mode = "otg";
maximum-speed = "high-speed";
};
#include "k3-j7200-common-proc-board-u-boot.dtsi" #include "k3-j7200-common-proc-board-u-boot.dtsi"