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x86: Disable microcode section for FSP2

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At present we don't support loading microcode with FSP2. The correct way
to do this is by adding it to the FIT. For now, disable including
microcode in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass
2019-12-06 21:42:26 -07:00
committed by Bin Meng
parent f45e747d6d
commit 86a8fb3b3b
2 changed files with 11 additions and 0 deletions
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4
arch/x86/Kconfig
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@@ -588,6 +588,10 @@ config HAVE_REFCODE
broadwell) U-Boot will be missing some critical setup steps.
Various peripherals may fail to work.
config HAVE_MICROCODE
bool
default y if !FSP_VERSION2
config SMP
bool "Enable Symmetric Multiprocessing"
default n

7
arch/x86/dts/u-boot.dtsi
View File

@@ -37,11 +37,13 @@
};
#endif
#ifdef CONFIG_TPL
#ifdef CONFIG_HAVE_MICROCODE
u-boot-tpl-with-ucode-ptr {
offset = <CONFIG_TPL_TEXT_BASE>;
};
u-boot-tpl-dtb {
};
#endif
u-boot-spl {
offset = <CONFIG_SPL_TEXT_BASE>;
};
@@ -77,11 +79,16 @@
offset = <CONFIG_SYS_TEXT_BASE>;
};
#endif
#ifdef CONFIG_HAVE_MICROCODE
u-boot-dtb-with-ucode {
};
u-boot-ucode {
align = <16>;
};
#else
u-boot-dtb {
};
#endif
#ifdef CONFIG_HAVE_X86_FIT
intel-fit {
};