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riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
RISC-V defines the base integer instruction sets as RV32I and RV64I. Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_RV64I to match this convention. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
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@@ -99,9 +99,9 @@
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#define BOOTEFI_NAME "bootia32.efi"
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#elif defined(CONFIG_X86_RUN_64BIT)
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#define BOOTEFI_NAME "bootx64.efi"
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#elif defined(CONFIG_CPU_RISCV_32)
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#elif defined(CONFIG_ARCH_RV32I)
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#define BOOTEFI_NAME "bootriscv32.efi"
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#elif defined(CONFIG_CPU_RISCV_64)
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#elif defined(CONFIG_ARCH_RV64I)
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#define BOOTEFI_NAME "bootriscv64.efi"
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#endif
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#endif
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@@ -257,10 +257,10 @@
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#elif defined(__i386__)
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#define BOOTENV_EFI_PXE_ARCH "0x6"
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#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00006:UNDI:003000"
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#elif defined(CONFIG_CPU_RISCV_32) || ((defined(__riscv) && __riscv_xlen == 32))
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#elif defined(CONFIG_ARCH_RV32I) || ((defined(__riscv) && __riscv_xlen == 32))
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#define BOOTENV_EFI_PXE_ARCH "0x19"
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#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00025:UNDI:003000"
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#elif defined(CONFIG_CPU_RISCV_64) || ((defined(__riscv) && __riscv_xlen == 64))
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#elif defined(CONFIG_ARCH_RV64I) || ((defined(__riscv) && __riscv_xlen == 64))
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#define BOOTENV_EFI_PXE_ARCH "0x1b"
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#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00027:UNDI:003000"
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#elif defined(CONFIG_SANDBOX)
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