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video: Drop CONFIG_LCD_ALIGNMENT
This option is not needed now that the LCD implementation is being removed. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
committed by
Anatolij Gustschin
parent
b5b1ce8a21
commit
832bcbb083
8
README
8
README
@@ -815,14 +815,6 @@ The following options need to be configured:
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320x240. Black & white.
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320x240. Black & white.
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CONFIG_LCD_ALIGNMENT
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Normally the LCD is page-aligned (typically 4KB). If this is
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defined then the LCD will be aligned to this value instead.
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For ARM it is sometimes useful to use MMU_SECTION_SIZE
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here, since it is cheaper to change data cache settings on
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a per-section basis.
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- MII/PHY support:
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- MII/PHY support:
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CONFIG_PHY_CLOCK_FREQ (ppc4xx)
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CONFIG_PHY_CLOCK_FREQ (ppc4xx)
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@@ -35,10 +35,6 @@
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#endif
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#endif
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#endif
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#endif
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#ifndef CONFIG_LCD_ALIGNMENT
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#define CONFIG_LCD_ALIGNMENT PAGE_SIZE
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#endif
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#if (LCD_BPP != LCD_COLOR8) && (LCD_BPP != LCD_COLOR16) && \
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#if (LCD_BPP != LCD_COLOR8) && (LCD_BPP != LCD_COLOR16) && \
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(LCD_BPP != LCD_COLOR32)
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(LCD_BPP != LCD_COLOR32)
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#error Unsupported LCD BPP.
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#error Unsupported LCD BPP.
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@@ -239,10 +235,6 @@ ulong lcd_setmem(ulong addr)
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size = lcd_get_size(&line_length);
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size = lcd_get_size(&line_length);
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/* Round up to nearest full page, or MMU section if defined */
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size = ALIGN(size, CONFIG_LCD_ALIGNMENT);
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addr = ALIGN(addr - CONFIG_LCD_ALIGNMENT + 1, CONFIG_LCD_ALIGNMENT);
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/* Allocate pages for the frame buffer. */
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/* Allocate pages for the frame buffer. */
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addr -= size;
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addr -= size;
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@@ -18,11 +18,6 @@
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#define CONFIG_TEGRA_ENABLE_UARTA
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#define CONFIG_TEGRA_ENABLE_UARTA
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#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
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#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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/* Align LCD to 1MB boundary */
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#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE
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/* SPI */
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/* SPI */
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#define CONFIG_SPI_FLASH_SIZE (4 << 20)
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#define CONFIG_SPI_FLASH_SIZE (4 << 20)
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@@ -54,11 +54,6 @@
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"fdt_addr_r=0x03000000\0" \
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"fdt_addr_r=0x03000000\0" \
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"ramdisk_addr_r=0x03100000\0"
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"ramdisk_addr_r=0x03100000\0"
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/* Defines for SPL */
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/* Align LCD to 1MB boundary */
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#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE
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#ifdef CONFIG_TEGRA_LP0
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#ifdef CONFIG_TEGRA_LP0
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#define TEGRA_LP0_ADDR 0x1C406000
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#define TEGRA_LP0_ADDR 0x1C406000
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#define TEGRA_LP0_SIZE 0x2000
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#define TEGRA_LP0_SIZE 0x2000
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@@ -261,7 +261,6 @@ CONFIG_KSNET_SERDES_SGMII2_BASE
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CONFIG_KSNET_SERDES_SGMII_BASE
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CONFIG_KSNET_SERDES_SGMII_BASE
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CONFIG_L1_INIT_RAM
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CONFIG_L1_INIT_RAM
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CONFIG_L2_CACHE
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CONFIG_L2_CACHE
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CONFIG_LCD_ALIGNMENT
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CONFIG_LCD_MENU
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CONFIG_LCD_MENU
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CONFIG_LD9040
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CONFIG_LD9040
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CONFIG_LEGACY_BOOTCMD_ENV
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CONFIG_LEGACY_BOOTCMD_ENV
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