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https://xff.cz/git/u-boot/
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spi: add common fdt SPI driver interface
Add a common interface to fdt based SPI drivers. Each driver is represented by a table entry in fdt_spi_drivers[]. If there are multiple SPI drivers in the table, the first driver to return success from spi_init() will be registered as the SPI driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
@@ -27,4 +27,15 @@
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#include <asm/types.h>
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#include <asm/types.h>
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int tegra20_spi_cs_is_valid(unsigned int bus, unsigned int cs);
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struct spi_slave *tegra20_spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode);
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void tegra20_spi_free_slave(struct spi_slave *slave);
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int tegra20_spi_init(int *node_list, int count);
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int tegra20_spi_claim_bus(struct spi_slave *slave);
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void tegra20_spi_cs_activate(struct spi_slave *slave);
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void tegra20_spi_cs_deactivate(struct spi_slave *slave);
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int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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const void *data_out, void *data_in, unsigned long flags);
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#endif /* _TEGRA20_SPI_H_ */
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#endif /* _TEGRA20_SPI_H_ */
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@@ -27,4 +27,15 @@
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#include <asm/types.h>
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#include <asm/types.h>
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int tegra30_spi_init(int *node_list, int count);
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int tegra30_spi_cs_is_valid(unsigned int bus, unsigned int cs);
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struct spi_slave *tegra30_spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode);
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void tegra30_spi_free_slave(struct spi_slave *slave);
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int tegra30_spi_claim_bus(struct spi_slave *slave);
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void tegra30_spi_cs_activate(struct spi_slave *slave);
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void tegra30_spi_cs_deactivate(struct spi_slave *slave);
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int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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const void *data_out, void *data_in, unsigned long flags);
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#endif /* _TEGRA30_SPI_H_ */
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#endif /* _TEGRA30_SPI_H_ */
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@@ -132,7 +132,7 @@ int board_init(void)
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clock_init();
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clock_init();
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clock_verify();
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clock_verify();
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#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK)
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#ifdef CONFIG_FDT_SPI
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pin_mux_spi();
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pin_mux_spi();
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spi_init();
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spi_init();
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#endif
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#endif
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@@ -46,6 +46,7 @@ COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
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COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
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COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
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COBJS-$(CONFIG_SH_SPI) += sh_spi.o
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COBJS-$(CONFIG_SH_SPI) += sh_spi.o
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COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
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COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
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COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
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COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
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COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
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COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
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COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
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COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
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COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
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171
drivers/spi/fdt_spi.c
Normal file
171
drivers/spi/fdt_spi.c
Normal file
@@ -0,0 +1,171 @@
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/*
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* Common fdt based SPI driver front end
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*
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* Copyright (c) 2013 NVIDIA Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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#include <asm/arch-tegra/clk_rst.h>
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#include <asm/arch-tegra20/tegra20_sflash.h>
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#include <asm/arch-tegra20/tegra20_slink.h>
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#include <spi.h>
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#include <fdtdec.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct fdt_spi_driver {
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int compat;
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int max_ctrls;
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int (*init)(int *node_list, int count);
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int (*claim_bus)(struct spi_slave *slave);
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int (*release_bus)(struct spi_slave *slave);
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int (*cs_is_valid)(unsigned int bus, unsigned int cs);
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struct spi_slave *(*setup_slave)(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode);
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void (*free_slave)(struct spi_slave *slave);
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void (*cs_activate)(struct spi_slave *slave);
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void (*cs_deactivate)(struct spi_slave *slave);
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int (*xfer)(struct spi_slave *slave, unsigned int bitlen,
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const void *data_out, void *data_in, unsigned long flags);
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};
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static struct fdt_spi_driver fdt_spi_drivers[] = {
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#ifdef CONFIG_TEGRA20_SFLASH
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{
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.compat = COMPAT_NVIDIA_TEGRA20_SFLASH,
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.max_ctrls = 1,
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.init = tegra20_spi_init,
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.claim_bus = tegra20_spi_claim_bus,
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.cs_is_valid = tegra20_spi_cs_is_valid,
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.setup_slave = tegra20_spi_setup_slave,
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.free_slave = tegra20_spi_free_slave,
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.cs_activate = tegra20_spi_cs_activate,
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.cs_deactivate = tegra20_spi_cs_deactivate,
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.xfer = tegra20_spi_xfer,
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},
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#endif
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#ifdef CONFIG_TEGRA20_SLINK
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{
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.compat = COMPAT_NVIDIA_TEGRA20_SLINK,
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.max_ctrls = CONFIG_TEGRA_SLINK_CTRLS,
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.init = tegra30_spi_init,
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.claim_bus = tegra30_spi_claim_bus,
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.cs_is_valid = tegra30_spi_cs_is_valid,
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.setup_slave = tegra30_spi_setup_slave,
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.free_slave = tegra30_spi_free_slave,
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.cs_activate = tegra30_spi_cs_activate,
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.cs_deactivate = tegra30_spi_cs_deactivate,
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.xfer = tegra30_spi_xfer,
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},
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#endif
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};
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static struct fdt_spi_driver *driver;
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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if (!driver)
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return 0;
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else if (!driver->cs_is_valid)
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return 1;
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else
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return driver->cs_is_valid(bus, cs);
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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if (!driver || !driver->setup_slave)
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return NULL;
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return driver->setup_slave(bus, cs, max_hz, mode);
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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if (driver && driver->free_slave)
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return driver->free_slave(slave);
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}
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static int spi_init_driver(struct fdt_spi_driver *driver)
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{
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int count;
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int node_list[driver->max_ctrls];
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count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi",
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driver->compat,
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node_list,
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driver->max_ctrls);
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return driver->init(node_list, count);
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}
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void spi_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(fdt_spi_drivers); i++) {
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driver = &fdt_spi_drivers[i];
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if (!spi_init_driver(driver))
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break;
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}
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if (i == ARRAY_SIZE(fdt_spi_drivers))
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driver = NULL;
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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if (!driver)
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return 1;
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if (!driver->claim_bus)
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return 0;
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return driver->claim_bus(slave);
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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if (driver && driver->release_bus)
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driver->release_bus(slave);
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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if (driver && driver->cs_activate)
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driver->cs_activate(slave);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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if (driver && driver->cs_deactivate)
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driver->cs_deactivate(slave);
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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const void *data_out, void *data_in, unsigned long flags)
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{
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if (!driver || !driver->xfer)
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return -1;
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return driver->xfer(slave, bitlen, data_out, data_in, flags);
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}
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@@ -101,7 +101,7 @@ static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
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return container_of(slave, struct tegra_spi_slave, slave);
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return container_of(slave, struct tegra_spi_slave, slave);
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}
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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int tegra20_spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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{
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/* Tegra20 SPI-Flash - only 1 device ('bus/cs') */
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/* Tegra20 SPI-Flash - only 1 device ('bus/cs') */
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if (bus != 0 || cs != 0)
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if (bus != 0 || cs != 0)
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@@ -110,8 +110,8 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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return 1;
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return 1;
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}
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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struct spi_slave *tegra20_spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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unsigned int max_hz, unsigned int mode)
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{
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{
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struct tegra_spi_slave *spi;
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struct tegra_spi_slave *spi;
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@@ -151,25 +151,20 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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return &spi->slave;
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return &spi->slave;
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}
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}
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void spi_free_slave(struct spi_slave *slave)
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void tegra20_spi_free_slave(struct spi_slave *slave)
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{
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{
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struct tegra_spi_slave *spi = to_tegra_spi(slave);
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struct tegra_spi_slave *spi = to_tegra_spi(slave);
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free(spi);
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free(spi);
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}
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}
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void spi_init(void)
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int tegra20_spi_init(int *node_list, int count)
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{
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{
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struct tegra_spi_ctrl *ctrl;
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struct tegra_spi_ctrl *ctrl;
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int i;
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int i;
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int node = 0;
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int node = 0;
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int count;
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int found = 0;
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int node_list[1];
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count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi",
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COMPAT_NVIDIA_TEGRA20_SFLASH,
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node_list,
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1);
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for (i = 0; i < count; i++) {
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for (i = 0; i < count; i++) {
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ctrl = &spi_ctrls[i];
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ctrl = &spi_ctrls[i];
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node = node_list[i];
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node = node_list[i];
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@@ -193,13 +188,15 @@ void spi_init(void)
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continue;
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continue;
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}
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}
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ctrl->valid = 1;
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ctrl->valid = 1;
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found = 1;
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debug("%s: found controller at %p, freq = %u, periph_id = %d\n",
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debug("%s: found controller at %p, freq = %u, periph_id = %d\n",
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__func__, ctrl->regs, ctrl->freq, ctrl->periph_id);
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__func__, ctrl->regs, ctrl->freq, ctrl->periph_id);
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}
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}
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return !found;
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}
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}
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int spi_claim_bus(struct spi_slave *slave)
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int tegra20_spi_claim_bus(struct spi_slave *slave)
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{
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{
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struct tegra_spi_slave *spi = to_tegra_spi(slave);
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struct tegra_spi_slave *spi = to_tegra_spi(slave);
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struct spi_regs *regs = spi->ctrl->regs;
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struct spi_regs *regs = spi->ctrl->regs;
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@@ -213,7 +210,7 @@ int spi_claim_bus(struct spi_slave *slave)
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reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \
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reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \
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SPI_STAT_RXF_UNR | SPI_STAT_TXF_OVF;
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SPI_STAT_RXF_UNR | SPI_STAT_TXF_OVF;
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writel(reg, ®s->status);
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writel(reg, ®s->status);
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debug("spi_init: STATUS = %08x\n", readl(®s->status));
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debug("%s: STATUS = %08x\n", __func__, readl(®s->status));
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/*
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/*
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* Use sw-controlled CS, so we can clock in data after ReadID, etc.
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* Use sw-controlled CS, so we can clock in data after ReadID, etc.
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@@ -223,7 +220,7 @@ int spi_claim_bus(struct spi_slave *slave)
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reg |= 1 << SPI_CMD_ACTIVE_SCLK_SHIFT;
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reg |= 1 << SPI_CMD_ACTIVE_SCLK_SHIFT;
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clrsetbits_le32(®s->command, SPI_CMD_ACTIVE_SCLK_MASK |
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clrsetbits_le32(®s->command, SPI_CMD_ACTIVE_SCLK_MASK |
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SPI_CMD_ACTIVE_SDA_MASK, SPI_CMD_CS_SOFT | reg);
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SPI_CMD_ACTIVE_SDA_MASK, SPI_CMD_CS_SOFT | reg);
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debug("spi_init: COMMAND = %08x\n", readl(®s->command));
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debug("%s: COMMAND = %08x\n", __func__, readl(®s->command));
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/*
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/*
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* SPI pins on Tegra20 are muxed - change pinmux later due to UART
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* SPI pins on Tegra20 are muxed - change pinmux later due to UART
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@@ -236,17 +233,7 @@ int spi_claim_bus(struct spi_slave *slave)
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return 0;
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return 0;
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}
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}
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void spi_release_bus(struct spi_slave *slave)
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void tegra20_spi_cs_activate(struct spi_slave *slave)
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{
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/*
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* We can't release UART_DISABLE and set pinmux to UART4 here since
|
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* some code (e,g, spi_flash_probe) uses printf() while the SPI
|
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* bus is held. That is arguably bad, but it has the advantage of
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* already being in the source tree.
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*/
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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{
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struct tegra_spi_slave *spi = to_tegra_spi(slave);
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struct tegra_spi_slave *spi = to_tegra_spi(slave);
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struct spi_regs *regs = spi->ctrl->regs;
|
struct spi_regs *regs = spi->ctrl->regs;
|
||||||
@@ -255,7 +242,7 @@ void spi_cs_activate(struct spi_slave *slave)
|
|||||||
setbits_le32(®s->command, SPI_CMD_CS_VAL);
|
setbits_le32(®s->command, SPI_CMD_CS_VAL);
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_cs_deactivate(struct spi_slave *slave)
|
void tegra20_spi_cs_deactivate(struct spi_slave *slave)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
struct spi_regs *regs = spi->ctrl->regs;
|
struct spi_regs *regs = spi->ctrl->regs;
|
||||||
@@ -264,7 +251,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
|
|||||||
clrbits_le32(®s->command, SPI_CMD_CS_VAL);
|
clrbits_le32(®s->command, SPI_CMD_CS_VAL);
|
||||||
}
|
}
|
||||||
|
|
||||||
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
|
int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
|
||||||
const void *data_out, void *data_in, unsigned long flags)
|
const void *data_out, void *data_in, unsigned long flags)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
|
@@ -107,7 +107,7 @@ static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
|
|||||||
return container_of(slave, struct tegra_spi_slave, slave);
|
return container_of(slave, struct tegra_spi_slave, slave);
|
||||||
}
|
}
|
||||||
|
|
||||||
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
|
int tegra30_spi_cs_is_valid(unsigned int bus, unsigned int cs)
|
||||||
{
|
{
|
||||||
if (bus >= CONFIG_TEGRA_SLINK_CTRLS || cs > 3 || !spi_ctrls[bus].valid)
|
if (bus >= CONFIG_TEGRA_SLINK_CTRLS || cs > 3 || !spi_ctrls[bus].valid)
|
||||||
return 0;
|
return 0;
|
||||||
@@ -115,7 +115,7 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
|
|||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
|
struct spi_slave *tegra30_spi_setup_slave(unsigned int bus, unsigned int cs,
|
||||||
unsigned int max_hz, unsigned int mode)
|
unsigned int max_hz, unsigned int mode)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi;
|
struct tegra_spi_slave *spi;
|
||||||
@@ -159,25 +159,20 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
|
|||||||
return &spi->slave;
|
return &spi->slave;
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_free_slave(struct spi_slave *slave)
|
void tegra30_spi_free_slave(struct spi_slave *slave)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
|
|
||||||
free(spi);
|
free(spi);
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_init(void)
|
int tegra30_spi_init(int *node_list, int count)
|
||||||
{
|
{
|
||||||
struct tegra_spi_ctrl *ctrl;
|
struct tegra_spi_ctrl *ctrl;
|
||||||
int i;
|
int i;
|
||||||
int node = 0;
|
int node = 0;
|
||||||
int count;
|
int found = 0;
|
||||||
int node_list[CONFIG_TEGRA_SLINK_CTRLS];
|
|
||||||
|
|
||||||
count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi",
|
|
||||||
COMPAT_NVIDIA_TEGRA20_SLINK,
|
|
||||||
node_list,
|
|
||||||
CONFIG_TEGRA_SLINK_CTRLS);
|
|
||||||
for (i = 0; i < count; i++) {
|
for (i = 0; i < count; i++) {
|
||||||
ctrl = &spi_ctrls[i];
|
ctrl = &spi_ctrls[i];
|
||||||
node = node_list[i];
|
node = node_list[i];
|
||||||
@@ -201,13 +196,15 @@ void spi_init(void)
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
ctrl->valid = 1;
|
ctrl->valid = 1;
|
||||||
|
found = 1;
|
||||||
|
|
||||||
debug("%s: found controller at %p, freq = %u, periph_id = %d\n",
|
debug("%s: found controller at %p, freq = %u, periph_id = %d\n",
|
||||||
__func__, ctrl->regs, ctrl->freq, ctrl->periph_id);
|
__func__, ctrl->regs, ctrl->freq, ctrl->periph_id);
|
||||||
}
|
}
|
||||||
|
return !found;
|
||||||
}
|
}
|
||||||
|
|
||||||
int spi_claim_bus(struct spi_slave *slave)
|
int tegra30_spi_claim_bus(struct spi_slave *slave)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
struct spi_regs *regs = spi->ctrl->regs;
|
struct spi_regs *regs = spi->ctrl->regs;
|
||||||
@@ -232,11 +229,7 @@ int spi_claim_bus(struct spi_slave *slave)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_release_bus(struct spi_slave *slave)
|
void tegra30_spi_cs_activate(struct spi_slave *slave)
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_cs_activate(struct spi_slave *slave)
|
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
struct spi_regs *regs = spi->ctrl->regs;
|
struct spi_regs *regs = spi->ctrl->regs;
|
||||||
@@ -245,7 +238,7 @@ void spi_cs_activate(struct spi_slave *slave)
|
|||||||
setbits_le32(®s->command, SLINK_CMD_CS_VAL);
|
setbits_le32(®s->command, SLINK_CMD_CS_VAL);
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_cs_deactivate(struct spi_slave *slave)
|
void tegra30_spi_cs_deactivate(struct spi_slave *slave)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
struct spi_regs *regs = spi->ctrl->regs;
|
struct spi_regs *regs = spi->ctrl->regs;
|
||||||
@@ -254,7 +247,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
|
|||||||
clrbits_le32(®s->command, SLINK_CMD_CS_VAL);
|
clrbits_le32(®s->command, SLINK_CMD_CS_VAL);
|
||||||
}
|
}
|
||||||
|
|
||||||
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
|
int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
|
||||||
const void *data_out, void *data_in, unsigned long flags)
|
const void *data_out, void *data_in, unsigned long flags)
|
||||||
{
|
{
|
||||||
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
struct tegra_spi_slave *spi = to_tegra_spi(slave);
|
||||||
|
@@ -150,6 +150,10 @@
|
|||||||
MEM_LAYOUT_ENV_SETTINGS \
|
MEM_LAYOUT_ENV_SETTINGS \
|
||||||
BOOTCMDS_COMMON
|
BOOTCMDS_COMMON
|
||||||
|
|
||||||
|
#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK)
|
||||||
|
#define CONFIG_FDT_SPI
|
||||||
|
#endif
|
||||||
|
|
||||||
/* overrides for SPL build here */
|
/* overrides for SPL build here */
|
||||||
#ifdef CONFIG_SPL_BUILD
|
#ifdef CONFIG_SPL_BUILD
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user