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Merge branch 'elf_reloc'
Conflicts: arch/arm/include/asm/config.h board/LaCie/edminiv2/config.mk board/karo/tx25/config.mk board/logicpd/imx27lite/config.mk doc/README.arm-relocation Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
@@ -1,49 +1,54 @@
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To make relocation on arm working, the following changes are done:
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Add new compilerflag:
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At arch level: add linker flag -pie
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-fPIC
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This causes the linker to generate fixup tables .rel.dyn and .dynsym,
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which must be applied to the relocated image before transferring
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control to it.
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-> compiler generates position independent code
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These fixups are described in the ARM ELF documentation as type 23
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(program-base-relative) and 2 (symbol-relative)
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changes in board code:
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At cpu level: modify linker file and add a relocation and fixup loop
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- dram_init:
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- bd pointer is now at this point not accessible, so only
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detect the real dramsize, and store it in gd->ram_size.
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best detected with get_ram_size();
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ToDo: move there also the dram initialization on boards where
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it is possible.
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- setup the bd_t dram bank info in the new function
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dram_init_banksize().
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the linker file must be modified to include the .rel.dyn and .dynsym
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tables in the binary image, and to provide symbols for the relocation
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code to access these tables
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- board.c code is adapted from ppc code
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The relocation and fixup loop must be executed after executing
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board_init_f at initial location and before executing board_init_r
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at final location.
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- undef CONFIG_RELOC_FIXUP_WORKS
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At board level:
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-> cmdtabl, and subcommand table must be handled from "hand"
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collected in section "__datarellocal_start".
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dram_init(): bd pointer is now at this point not accessible, so only
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detect the real dramsize, and store it in gd->ram_size. Bst detected
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with get_ram_size().
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- How To fixup the sections:
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TODO: move also dram initialization there on boards where it is possible.
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__datarel_start, __datarelrolocal_start, __datarellocal_start and
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__datarelro_start
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Setup of the the bd_t dram bank info is done in the new function
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dram_init_banksize() called after bd is accessible.
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automatically? Then it should be possible to define again
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CONFIG_RELOC_FIXUP_WORKS
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At lib level:
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- irq stack setup is now not longer on a fix position, instead it is
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calculated in board_init_f, and stored in gd->irq_sp
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Board.c code is adapted from ppc code
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-------------------------------------------------------------------------------------
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At config level:
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To compile a board without relocation, define CONFIG_SYS_ARM_WITHOUT_RELOC
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This possibility will removed!! So please fix your board to compile without
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CONFIG_SYS_ARM_WITHOUT_RELOC defined!!!
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Define CONFIG_RELOC_FIXUP_WORKS.
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Undefine CONFIG_SYS_ARM_WITHOUT_RELOC
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-------------------------------------------------------------------------------------
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* WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING *
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For boards which boot from nand_spl, it is possible to save a copy
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Boards which are not fixed to support relocation will be REMOVED!
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Eventually, CONFIG_SYS_ARM_WITHOUT_RELOC and CONFIG_RELOC_FIXUP_WORKS will
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disappear and boards which have to migrated to relocation will disappear too.
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-----------------------------------------------------------------------------
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For boards which boot from nand_spl, it is possible to save one copy
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if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code
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is copied again in relocate_code().
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@@ -64,9 +69,9 @@ f) u-boot code steps through board_init_f() and calculates
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If CONFIG_SYS_TEXT_BASE == relocation address, the copying of u-boot
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in f) could be saved.
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-------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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ToDo:
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TODO
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- fill in bd_t infos (check)
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- adapt all boards
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@@ -80,7 +85,7 @@ ToDo:
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- new function dram_init_banksize() is actual board specific. Maybe
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we make a weak default function in arch/arm/lib/board.c ?
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-------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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Relocation with NAND_SPL (example for the tx25):
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@@ -98,158 +103,11 @@ Relocation with NAND_SPL (example for the tx25):
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from the nand_spl code), no need to copy, just go on with bss clear
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and jump to board_init_r.
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-------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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Relocation:
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How to translate flash addresses in GOT to ram addresses.
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This is automagically done from code, but this example
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shows, how this magic code works ;-)
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(example on the qong board)
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How ELF relocations 23 and 2 work.
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Find a variable:
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a) search it in System.map
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(for example flash_info)
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a005b4c0 B BootpID
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a005b4c4 B BootpTry
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a005b4c8 b slave
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a005b4cc B flash_info
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^^^^^^^^
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a005c908 b saved_sector.4002
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a005c910 b cfi_mtd_info
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a005c9c0 b cfi_mtd_names
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a005c9d0 B mtd_table
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---------------------------------------
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b) create hexdump from u-boot code:
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hexdump -C u-boot > gnlmpfhex
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---------------------------------------
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c) search the variables address in the hexdump
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*
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0005fc80 00 00 00 00 00 00 00 00 2c 06 01 a0 18 cd 05 a0 |........,.......|
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0005fc90 9c d4 05 a0 bc b4 05 a0 1c 7f 05 a0 f0 05 01 a0 |................|
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0005fca0 08 5a 04 a0 1c ab 05 a0 ec a4 05 a0 98 c3 01 a0 |.Z..............|
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0005fcb0 a0 d6 05 a0 04 71 05 a0 c0 f9 00 a0 3c cd 05 a0 |.....q......<...|
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0005fcc0 cc b4 05 a0 f0 fa 00 a0 f0 d6 05 a0 10 86 05 a0 |................|
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^^^^^^^^^^^
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0005fcd0 a4 16 06 a0 dc 64 05 a0 18 86 05 a0 52 48 05 a0 |.....d......RH..|
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0005fce0 c0 86 05 a0 24 6e 02 a0 b4 6c 05 a0 b0 94 01 a0 |....$n...l......|
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0005fcf0 1c 86 05 a0 50 85 05 a0 d4 0c 06 a0 bc 0b 06 a0 |....P...........|
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-> 0005fcc0
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----------------------------------------
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d) know we calculate this address in RAM
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8ff08000 (new address of code in RAM *1)
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+ 0005fcc0
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- 00008000 (offset of text *2)
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----------
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8ff5fcc0 -> Addr GOT in RAM
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*1:
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activate debug and look for the line:
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Now running in RAM - U-Boot at: 8ff08000
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^^^^^^^^
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new address of u-boot code in RAM
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*2:
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Section Headers:
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[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
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[ 0] NULL 00000000 000000 000000 00 0 0 0
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[ 1] .text PROGBITS a0000000 008000 04599c 00 AX 0 0 32
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^^^^^^
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Offset of text
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----------------------------------------
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e) now we look in 8ff5fcc0 (RAM)
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QongEVB>md 0x8ff5fcc0
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8ff5fcc0 : a005b4cc a000faf0 a005d6f0 a0058610 ................
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^^^^^^^^
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Bingo, here we have the old flash address (when relocation
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is working, here is the fixed ram address. see @ f, how
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it gets calculated)
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----------------------------------------
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f) now translate it in the new RAM address
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a005b4cc
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- a0000000 TextBase
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+ 8ff08000 new address of u-boot in ram
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----------
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8ff634cc
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QongEVB>mm 0x8ff5fcc0 0x8ff634cc 1
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QongEVB>md 0x8ff5fcc0
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8ff5fcc0 : 8ff634cc a000faf0 a005d6f0 a0058610 .4..............
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8ff5fcd0 : a00616a4 a00564dc a0058618 a0054852 .....d......RH..
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As this must be done for all address in the GOT, the u-boot
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code did this automagically ... :-)
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----------------------------------------------
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g) check if the new address is really in the bss section:
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bss start:
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8ff6054c (8ff08000 + 0005854C monitorlen)
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bss end:
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8ff698ac (8ff08000 + 618AC)
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8ff634cc is in bss :-)
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----------------------------------------------
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h) u-boot prints:
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important addresses:
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U-Boot code: A0000000 -> A005854C BSS: -> A00618AC TextBase 0xa0000000
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Now running in RAM - U-Boot at: 8ff08000 relocBase 0x8ff08000
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---------
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U-Boot 2010.06-rc2-00002-gf8fbb25-dirty (Jun 18 2010 - 17:07:19)
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U-Boot code: A0000000 -> A005854C BSS: -> A00618AC
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CPU: Freescale i.MX31 at 398 MHz
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Board: DAVE/DENX Qong
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mon: FFFFFFFF gd->monLen: 000618AC
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Top of RAM usable for U-Boot at: 90000000
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LCD panel info: 640 x 480, 16 bit/pix
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Reserving 600k for LCD Framebuffer at: 8ff6a000
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Reserving 390k for U-Boot at: 8ff08000
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Reserving 1280k for malloc() at: 8fdc8000
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Reserving 28 Bytes for Board Info at: 8fdc7fe4
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Reserving 48 Bytes for Global Data at: 8fdc7fb4
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New Stack Pointer is: 8fdc7fb0
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RAM Configuration:
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Bank #0: 80000000 256 MiB
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mon: 0005854C gd->monLen: 000618AC
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Now running in RAM - U-Boot at: 8ff08000
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TBC
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-------------------------------------------------------------------------------------
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