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driver/ddr: Add 256 byte interleaving support

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Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.

Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
York Sun
2014-02-10 13:59:44 -08:00
committed by Tom Rini
parent 6b9e309a8a
commit 6b1e1254f3
6 changed files with 26 additions and 2 deletions
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drivers/ddr/fsl/main.c
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@@ -291,6 +291,7 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo,
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
if (pinfo->memctl_opts[i].memctl_interleaving) {
switch (pinfo->memctl_opts[i].memctl_interleaving_mode) {
case FSL_DDR_256B_INTERLEAVING:
case FSL_DDR_CACHE_LINE_INTERLEAVING:
case FSL_DDR_PAGE_INTERLEAVING:
case FSL_DDR_BANK_INTERLEAVING: